Searched hist:3926 (Results 1 - 11 of 11) sorted by relevance
| /gem5/src/cpu/testers/garnet_synthetic_traffic/ | ||
| H A D | GarnetSyntheticTraffic.hh | diff 12129:879f7ad9e246 Wed Jun 28 11:44:00 EDT 2017 Sean Wilson <spwilson2@wisc.edu> testers: Refactor some Event subclasses to lambdas Change-Id: I897b6162a827216b7bad74d955c0e50e06a5a3ec Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3926 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> |
| H A D | GarnetSyntheticTraffic.cc | diff 12129:879f7ad9e246 Wed Jun 28 11:44:00 EDT 2017 Sean Wilson <spwilson2@wisc.edu> testers: Refactor some Event subclasses to lambdas Change-Id: I897b6162a827216b7bad74d955c0e50e06a5a3ec Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3926 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> |
| /gem5/src/arch/sparc/ | ||
| H A D | asi.cc | diff 3926:c57925da8d38 Mon Jan 22 21:55:00 EST 2007 Ali Saidi <saidi@eecs.umich.edu> clean up fault code a little bit simplify and make complete some asi checks implement all the twin asis and remove panic checks on their use soft int is supported, so we don't need to print writes to it src/arch/sparc/asi.cc: make AsiIsLittle() be all the little asis. Speed up AsiIsTwin() a bit src/arch/sparc/faults.cc: clean up the do*Fault code.... Make it work like legion, in particular pstate.priv is left alone, not set to 0 like the spec says src/arch/sparc/isa/decoder.isa: implement some more twin ASIs src/arch/sparc/tlb.cc: All the twin asis are implemented, no need to say their not supported anymore src/arch/sparc/ua2005.cc: softint is supported now, no more need to |
| H A D | faults.cc | diff 3926:c57925da8d38 Mon Jan 22 21:55:00 EST 2007 Ali Saidi <saidi@eecs.umich.edu> clean up fault code a little bit simplify and make complete some asi checks implement all the twin asis and remove panic checks on their use soft int is supported, so we don't need to print writes to it src/arch/sparc/asi.cc: make AsiIsLittle() be all the little asis. Speed up AsiIsTwin() a bit src/arch/sparc/faults.cc: clean up the do*Fault code.... Make it work like legion, in particular pstate.priv is left alone, not set to 0 like the spec says src/arch/sparc/isa/decoder.isa: implement some more twin ASIs src/arch/sparc/tlb.cc: All the twin asis are implemented, no need to say their not supported anymore src/arch/sparc/ua2005.cc: softint is supported now, no more need to |
| H A D | ua2005.cc | diff 3926:c57925da8d38 Mon Jan 22 21:55:00 EST 2007 Ali Saidi <saidi@eecs.umich.edu> clean up fault code a little bit simplify and make complete some asi checks implement all the twin asis and remove panic checks on their use soft int is supported, so we don't need to print writes to it src/arch/sparc/asi.cc: make AsiIsLittle() be all the little asis. Speed up AsiIsTwin() a bit src/arch/sparc/faults.cc: clean up the do*Fault code.... Make it work like legion, in particular pstate.priv is left alone, not set to 0 like the spec says src/arch/sparc/isa/decoder.isa: implement some more twin ASIs src/arch/sparc/tlb.cc: All the twin asis are implemented, no need to say their not supported anymore src/arch/sparc/ua2005.cc: softint is supported now, no more need to |
| H A D | tlb.cc | diff 3926:c57925da8d38 Mon Jan 22 21:55:00 EST 2007 Ali Saidi <saidi@eecs.umich.edu> clean up fault code a little bit simplify and make complete some asi checks implement all the twin asis and remove panic checks on their use soft int is supported, so we don't need to print writes to it src/arch/sparc/asi.cc: make AsiIsLittle() be all the little asis. Speed up AsiIsTwin() a bit src/arch/sparc/faults.cc: clean up the do*Fault code.... Make it work like legion, in particular pstate.priv is left alone, not set to 0 like the spec says src/arch/sparc/isa/decoder.isa: implement some more twin ASIs src/arch/sparc/tlb.cc: All the twin asis are implemented, no need to say their not supported anymore src/arch/sparc/ua2005.cc: softint is supported now, no more need to |
| /gem5/src/cpu/testers/directedtest/ | ||
| H A D | RubyDirectedTester.cc | diff 12129:879f7ad9e246 Wed Jun 28 11:44:00 EDT 2017 Sean Wilson <spwilson2@wisc.edu> testers: Refactor some Event subclasses to lambdas Change-Id: I897b6162a827216b7bad74d955c0e50e06a5a3ec Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3926 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> |
| H A D | RubyDirectedTester.hh | diff 12129:879f7ad9e246 Wed Jun 28 11:44:00 EDT 2017 Sean Wilson <spwilson2@wisc.edu> testers: Refactor some Event subclasses to lambdas Change-Id: I897b6162a827216b7bad74d955c0e50e06a5a3ec Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3926 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> |
| /gem5/src/cpu/testers/rubytest/ | ||
| H A D | RubyTester.cc | diff 12129:879f7ad9e246 Wed Jun 28 11:44:00 EDT 2017 Sean Wilson <spwilson2@wisc.edu> testers: Refactor some Event subclasses to lambdas Change-Id: I897b6162a827216b7bad74d955c0e50e06a5a3ec Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3926 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> |
| H A D | RubyTester.hh | diff 12129:879f7ad9e246 Wed Jun 28 11:44:00 EDT 2017 Sean Wilson <spwilson2@wisc.edu> testers: Refactor some Event subclasses to lambdas Change-Id: I897b6162a827216b7bad74d955c0e50e06a5a3ec Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3926 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> |
| /gem5/src/arch/sparc/isa/ | ||
| H A D | decoder.isa | diff 3926:c57925da8d38 Mon Jan 22 21:55:00 EST 2007 Ali Saidi <saidi@eecs.umich.edu> clean up fault code a little bit simplify and make complete some asi checks implement all the twin asis and remove panic checks on their use soft int is supported, so we don't need to print writes to it src/arch/sparc/asi.cc: make AsiIsLittle() be all the little asis. Speed up AsiIsTwin() a bit src/arch/sparc/faults.cc: clean up the do*Fault code.... Make it work like legion, in particular pstate.priv is left alone, not set to 0 like the spec says src/arch/sparc/isa/decoder.isa: implement some more twin ASIs src/arch/sparc/tlb.cc: All the twin asis are implemented, no need to say their not supported anymore src/arch/sparc/ua2005.cc: softint is supported now, no more need to |
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