Searched hist:2561 (Results 1 - 3 of 3) sorted by relevance
| /gem5/src/systemc/tests/ | ||
| H A D | config.py | diff 13725:2561f9828b95 Wed Feb 20 19:41:00 EST 2019 Gabe Black <gabeblack@google.com> systemc: Start using the m5.systemc module in the test config.py. Start using sc_main and sc_main_result from the systemc module, and stop using the versions of those functions which are attached to the SystemC_Kernel SimObject. Change-Id: I802898038c80ed36e6a9176211cffb7e0fde2d7e Reviewed-on: https://gem5-review.googlesource.com/c/16564 Maintainer: Gabe Black <gabeblack@google.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> |
| /gem5/configs/example/arm/ | ||
| H A D | devices.py | diff 11936:8ab45fd19f40 Fri Mar 17 07:10:00 EDT 2017 Andreas Sandberg <andreas.sandberg@arm.com> config, arm: Add multi-core KVM support to bL config Add support for KVM in the big.LITTLE(tm) example configuration. This replaces the --atomic option with a --cpu-type option that can be used to switch between atomic, kvm, and timing simulation. When running in KVM mode, the simulation script automatically assigns separate event queues (threads) to each of the simulated CPUs. All simulated devices, including CPU child devices (e.g., interrupt controllers and caches), are assigned to event queue 0. Change-Id: Ic9a3f564db91f5a3d3cb754c5a02fdd5c17d5fdf Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com> Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2561 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Weiping Liao <weipingliao@google.com> |
| H A D | fs_bigLITTLE.py | diff 11936:8ab45fd19f40 Fri Mar 17 07:10:00 EDT 2017 Andreas Sandberg <andreas.sandberg@arm.com> config, arm: Add multi-core KVM support to bL config Add support for KVM in the big.LITTLE(tm) example configuration. This replaces the --atomic option with a --cpu-type option that can be used to switch between atomic, kvm, and timing simulation. When running in KVM mode, the simulation script automatically assigns separate event queues (threads) to each of the simulated CPUs. All simulated devices, including CPU child devices (e.g., interrupt controllers and caches), are assigned to event queue 0. Change-Id: Ic9a3f564db91f5a3d3cb754c5a02fdd5c17d5fdf Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com> Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2561 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Weiping Liao <weipingliao@google.com> |
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