1# Copyright (c) 2016-2017, 2019 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated 10# unmodified and in its entirety in all distributions of the software, 11# modified or unmodified, in source code or in binary form. 12# 13# Redistribution and use in source and binary forms, with or without 14# modification, are permitted provided that the following conditions are 15# met: redistributions of source code must retain the above copyright 16# notice, this list of conditions and the following disclaimer; 17# redistributions in binary form must reproduce the above copyright 18# notice, this list of conditions and the following disclaimer in the 19# documentation and/or other materials provided with the distribution; 20# neither the name of the copyright holders nor the names of its 21# contributors may be used to endorse or promote products derived from 22# this software without specific prior written permission. 23# 24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35# 36# Authors: Gabor Dozsa 37# Andreas Sandberg 38 39# This is an example configuration script for full system simulation of 40# a generic ARM bigLITTLE system. 41 42 43from __future__ import print_function 44from __future__ import absolute_import 45 46import argparse 47import os 48import sys 49import m5 50import m5.util 51from m5.objects import * 52 53m5.util.addToPath("../../") 54 55from common import SysPaths 56from common import CpuConfig 57from common import PlatformConfig 58from common.cores.arm import ex5_big, ex5_LITTLE 59 60import devices 61from devices import AtomicCluster, KvmCluster 62 63 64default_disk = 'aarch64-ubuntu-trusty-headless.img' 65default_rcs = 'bootscript.rcS' 66 67default_mem_size= "2GB" 68 69def _to_ticks(value): 70 """Helper function to convert a latency from string format to Ticks""" 71 72 return m5.ticks.fromSeconds(m5.util.convert.anyToLatency(value)) 73 74def _using_pdes(root): 75 """Determine if the simulator is using multiple parallel event queues""" 76 77 for obj in root.descendants(): 78 if not m5.proxy.isproxy(obj.eventq_index) and \ 79 obj.eventq_index != root.eventq_index: 80 return True 81 82 return False 83 84 85class BigCluster(devices.CpuCluster): 86 def __init__(self, system, num_cpus, cpu_clock, 87 cpu_voltage="1.0V"): 88 cpu_config = [ CpuConfig.get("O3_ARM_v7a_3"), devices.L1I, devices.L1D, 89 devices.WalkCache, devices.L2 ] 90 super(BigCluster, self).__init__(system, num_cpus, cpu_clock, 91 cpu_voltage, *cpu_config) 92 93class LittleCluster(devices.CpuCluster): 94 def __init__(self, system, num_cpus, cpu_clock, 95 cpu_voltage="1.0V"): 96 cpu_config = [ CpuConfig.get("MinorCPU"), devices.L1I, devices.L1D, 97 devices.WalkCache, devices.L2 ] 98 super(LittleCluster, self).__init__(system, num_cpus, cpu_clock, 99 cpu_voltage, *cpu_config) 100 101class Ex5BigCluster(devices.CpuCluster): 102 def __init__(self, system, num_cpus, cpu_clock, 103 cpu_voltage="1.0V"): 104 cpu_config = [ CpuConfig.get("ex5_big"), ex5_big.L1I, ex5_big.L1D, 105 ex5_big.WalkCache, ex5_big.L2 ] 106 super(Ex5BigCluster, self).__init__(system, num_cpus, cpu_clock, 107 cpu_voltage, *cpu_config) 108 109class Ex5LittleCluster(devices.CpuCluster): 110 def __init__(self, system, num_cpus, cpu_clock, 111 cpu_voltage="1.0V"): 112 cpu_config = [ CpuConfig.get("ex5_LITTLE"), ex5_LITTLE.L1I, 113 ex5_LITTLE.L1D, ex5_LITTLE.WalkCache, ex5_LITTLE.L2 ] 114 super(Ex5LittleCluster, self).__init__(system, num_cpus, cpu_clock, 115 cpu_voltage, *cpu_config) 116 117def createSystem(caches, kernel, bootscript, 118 machine_type="VExpress_GEM5", disks=[]): 119 platform = PlatformConfig.get(machine_type) 120 m5.util.inform("Simulated platform: %s", platform.__name__) 121 122 sys = devices.SimpleSystem(caches, default_mem_size, platform(), 123 kernel=SysPaths.binary(kernel), 124 readfile=bootscript) 125 126 sys.mem_ctrls = [ SimpleMemory(range=r, port=sys.membus.master) 127 for r in sys.mem_ranges ] 128 129 sys.connect() 130 131 # Attach disk images 132 if disks: 133 def cow_disk(image_file): 134 image = CowDiskImage() 135 image.child.image_file = SysPaths.disk(image_file) 136 return image 137 138 sys.disk_images = [ cow_disk(f) for f in disks ] 139 sys.pci_vio_block = [ PciVirtIO(vio=VirtIOBlock(image=img)) 140 for img in sys.disk_images ] 141 for dev in sys.pci_vio_block: 142 sys.attach_pci(dev) 143 144 sys.realview.setupBootLoader(sys.membus, sys, SysPaths.binary) 145 146 return sys 147 148cpu_types = { 149 "atomic" : (AtomicCluster, AtomicCluster), 150 "timing" : (BigCluster, LittleCluster), 151 "exynos" : (Ex5BigCluster, Ex5LittleCluster), 152} 153 154# Only add the KVM CPU if it has been compiled into gem5 155if devices.have_kvm: 156 cpu_types["kvm"] = (KvmCluster, KvmCluster) 157 158 159def addOptions(parser): 160 parser.add_argument("--restore-from", type=str, default=None, 161 help="Restore from checkpoint") 162 parser.add_argument("--dtb", type=str, default=None, 163 help="DTB file to load") 164 parser.add_argument("--kernel", type=str, required=True, 165 help="Linux kernel") 166 parser.add_argument("--root", type=str, default="/dev/vda1", 167 help="Specify the kernel CLI root= argument") 168 parser.add_argument("--machine-type", type=str, 169 choices=PlatformConfig.platform_names(), 170 default="VExpress_GEM5", 171 help="Hardware platform class") 172 parser.add_argument("--disk", action="append", type=str, default=[], 173 help="Disks to instantiate") 174 parser.add_argument("--bootscript", type=str, default=default_rcs, 175 help="Linux bootscript") 176 parser.add_argument("--cpu-type", type=str, choices=cpu_types.keys(), 177 default="timing", 178 help="CPU simulation mode. Default: %(default)s") 179 parser.add_argument("--kernel-init", type=str, default="/sbin/init", 180 help="Override init") 181 parser.add_argument("--big-cpus", type=int, default=1, 182 help="Number of big CPUs to instantiate") 183 parser.add_argument("--little-cpus", type=int, default=1, 184 help="Number of little CPUs to instantiate") 185 parser.add_argument("--caches", action="store_true", default=False, 186 help="Instantiate caches") 187 parser.add_argument("--last-cache-level", type=int, default=2, 188 help="Last level of caches (e.g. 3 for L3)") 189 parser.add_argument("--big-cpu-clock", type=str, default="2GHz", 190 help="Big CPU clock frequency") 191 parser.add_argument("--little-cpu-clock", type=str, default="1GHz", 192 help="Little CPU clock frequency") 193 parser.add_argument("--sim-quantum", type=str, default="1ms", 194 help="Simulation quantum for parallel simulation. " \ 195 "Default: %(default)s") 196 parser.add_argument("-P", "--param", action="append", default=[], 197 help="Set a SimObject parameter relative to the root node. " 198 "An extended Python multi range slicing syntax can be used " 199 "for arrays. For example: " 200 "'system.cpu[0,1,3:8:2].max_insts_all_threads = 42' " 201 "sets max_insts_all_threads for cpus 0, 1, 3, 5 and 7 " 202 "Direct parameters of the root object are not accessible, " 203 "only parameters of its children.") 204 return parser 205 206def build(options): 207 m5.ticks.fixGlobalFrequency() 208 209 kernel_cmd = [ 210 "earlyprintk=pl011,0x1c090000", 211 "console=ttyAMA0", 212 "lpj=19988480", 213 "norandmaps", 214 "loglevel=8", 215 "mem=%s" % default_mem_size, 216 "root=%s" % options.root, 217 "rw", 218 "init=%s" % options.kernel_init, 219 "vmalloc=768MB", 220 ] 221 222 root = Root(full_system=True) 223 224 disks = [default_disk] if len(options.disk) == 0 else options.disk 225 system = createSystem(options.caches, 226 options.kernel, 227 options.bootscript, 228 options.machine_type, 229 disks=disks) 230 231 root.system = system 232 system.boot_osflags = " ".join(kernel_cmd) 233 234 if options.big_cpus + options.little_cpus == 0: 235 m5.util.panic("Empty CPU clusters") 236 237 big_model, little_model = cpu_types[options.cpu_type] 238 239 all_cpus = [] 240 # big cluster 241 if options.big_cpus > 0: 242 system.bigCluster = big_model(system, options.big_cpus, 243 options.big_cpu_clock) 244 system.mem_mode = system.bigCluster.memoryMode() 245 all_cpus += system.bigCluster.cpus 246 247 # little cluster 248 if options.little_cpus > 0: 249 system.littleCluster = little_model(system, options.little_cpus, 250 options.little_cpu_clock) 251 system.mem_mode = system.littleCluster.memoryMode() 252 all_cpus += system.littleCluster.cpus 253 254 # Figure out the memory mode 255 if options.big_cpus > 0 and options.little_cpus > 0 and \ 256 system.bigCluster.memoryMode() != system.littleCluster.memoryMode(): 257 m5.util.panic("Memory mode missmatch among CPU clusters") 258 259 260 # create caches 261 system.addCaches(options.caches, options.last_cache_level) 262 if not options.caches: 263 if options.big_cpus > 0 and system.bigCluster.requireCaches(): 264 m5.util.panic("Big CPU model requires caches") 265 if options.little_cpus > 0 and system.littleCluster.requireCaches(): 266 m5.util.panic("Little CPU model requires caches") 267 268 # Create a KVM VM and do KVM-specific configuration 269 if issubclass(big_model, KvmCluster): 270 _build_kvm(system, all_cpus) 271 272 # Linux device tree 273 if options.dtb is not None: 274 system.dtb_filename = SysPaths.binary(options.dtb) 275 else: 276 system.generateDtb(m5.options.outdir, 'system.dtb') 277 278 return root 279 280def _build_kvm(system, cpus): 281 system.kvm_vm = KvmVM() 282 283 # Assign KVM CPUs to their own event queues / threads. This 284 # has to be done after creating caches and other child objects 285 # since these mustn't inherit the CPU event queue. 286 if len(cpus) > 1: 287 device_eq = 0 288 first_cpu_eq = 1 289 for idx, cpu in enumerate(cpus): 290 # Child objects usually inherit the parent's event 291 # queue. Override that and use the same event queue for 292 # all devices. 293 for obj in cpu.descendants(): 294 obj.eventq_index = device_eq 295 cpu.eventq_index = first_cpu_eq + idx 296 297 298 299def instantiate(options, checkpoint_dir=None): 300 # Setup the simulation quantum if we are running in PDES-mode 301 # (e.g., when using KVM) 302 root = Root.getInstance() 303 if root and _using_pdes(root): 304 m5.util.inform("Running in PDES mode with a %s simulation quantum.", 305 options.sim_quantum) 306 root.sim_quantum = _to_ticks(options.sim_quantum) 307 308 # Get and load from the chkpt or simpoint checkpoint 309 if options.restore_from: 310 if checkpoint_dir and not os.path.isabs(options.restore_from): 311 cpt = os.path.join(checkpoint_dir, options.restore_from) 312 else: 313 cpt = options.restore_from 314 315 m5.util.inform("Restoring from checkpoint %s", cpt) 316 m5.instantiate(cpt) 317 else: 318 m5.instantiate() 319 320 321def run(checkpoint_dir=m5.options.outdir): 322 # start simulation (and drop checkpoints when requested) 323 while True: 324 event = m5.simulate() 325 exit_msg = event.getCause() 326 if exit_msg == "checkpoint": 327 print("Dropping checkpoint at tick %d" % m5.curTick()) 328 cpt_dir = os.path.join(checkpoint_dir, "cpt.%d" % m5.curTick()) 329 m5.checkpoint(cpt_dir) 330 print("Checkpoint done.") 331 else: 332 print(exit_msg, " @ ", m5.curTick()) 333 break 334 335 sys.exit(event.getCode()) 336 337 338def main(): 339 parser = argparse.ArgumentParser( 340 description="Generic ARM big.LITTLE configuration") 341 addOptions(parser) 342 options = parser.parse_args() 343 root = build(options) 344 root.apply_config(options.param) 345 instantiate(options) 346 run() 347 348 349if __name__ == "__m5_main__": 350 main() 351