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| /gem5/src/dev/arm/ | ||
| H A D | gic_v3_cpu_interface.cc | diff 14246:033f20c96440 Fri Aug 23 10:56:00 EDT 2019 Giacomo Travaglini <giacomo.travaglini@arm.com> arch-arm, dev-arm: MISCREG_ICC_AP1R0_EL1 using AA64 banking Change-Id: Ide93464f62288fbe8f409f718487a15512c01295 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20627 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com> |
| /gem5/src/arch/arm/ | ||
| H A D | miscregs.cc | diff 14246:033f20c96440 Fri Aug 23 10:56:00 EDT 2019 Giacomo Travaglini <giacomo.travaglini@arm.com> arch-arm, dev-arm: MISCREG_ICC_AP1R0_EL1 using AA64 banking Change-Id: Ide93464f62288fbe8f409f718487a15512c01295 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20627 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com> |
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