Searched hist:13979 (Results 1 - 4 of 4) sorted by relevance
| /gem5/src/arch/arm/isa/insts/ | ||
| H A D | neon.isa | diff 13979:1e0c4607ac12 Tue Apr 30 13:24:00 EDT 2019 Ciro Santilli <ciro.santilli@arm.com> arch-arm: implement VMINNM and VMAXNM scalar version ARMv8.2 16-bit versions have not yet been implemented, but a placeholders were created for them. Refactor the nearby decoding tree to closely match the ARM spec A32 decode table. That piece of the tree can also be called from thumb which decodes it in the same way, although the thumb decode table has a different terminology The old code didn't match neither A32 or T32 terminologies, so it is better to at least match one of them to help verify correctness. Change-Id: Iabbbca2932557cf6c98ce36690c385c3ddf39ed8 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18690 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com> |
| H A D | fp.isa | diff 13979:1e0c4607ac12 Tue Apr 30 13:24:00 EDT 2019 Ciro Santilli <ciro.santilli@arm.com> arch-arm: implement VMINNM and VMAXNM scalar version ARMv8.2 16-bit versions have not yet been implemented, but a placeholders were created for them. Refactor the nearby decoding tree to closely match the ARM spec A32 decode table. That piece of the tree can also be called from thumb which decodes it in the same way, although the thumb decode table has a different terminology The old code didn't match neither A32 or T32 terminologies, so it is better to at least match one of them to help verify correctness. Change-Id: Iabbbca2932557cf6c98ce36690c385c3ddf39ed8 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18690 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com> |
| /gem5/src/systemc/core/ | ||
| H A D | SConscript | diff 13405:7d430f2488e0 Wed Nov 07 03:17:00 EST 2018 Gabe Black <gabeblack@google.com> systemc: Only build python utility code if python is enabled. Change-Id: I58054ddd0d5ef0dbee18028c4218e7418347f959 Reviewed-on: https://gem5-review.googlesource.com/c/13979 Maintainer: Gabe Black <gabeblack@google.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> |
| /gem5/src/arch/arm/isa/formats/ | ||
| H A D | fp.isa | diff 13979:1e0c4607ac12 Tue Apr 30 13:24:00 EDT 2019 Ciro Santilli <ciro.santilli@arm.com> arch-arm: implement VMINNM and VMAXNM scalar version ARMv8.2 16-bit versions have not yet been implemented, but a placeholders were created for them. Refactor the nearby decoding tree to closely match the ARM spec A32 decode table. That piece of the tree can also be called from thumb which decodes it in the same way, although the thumb decode table has a different terminology The old code didn't match neither A32 or T32 terminologies, so it is better to at least match one of them to help verify correctness. Change-Id: Iabbbca2932557cf6c98ce36690c385c3ddf39ed8 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18690 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com> |
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