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/gem5/src/gpu-compute/
H A Dlocal_memory_pipeline.hhdiff 11693:bc1f702c25b9 Wed Oct 26 22:47:00 EDT 2016 Tony Gutierrez <anthony.gutierrez@amd.com> hsail, gpu-compute: remove doGm/SmReturn add completeAcc

we are removing doGmReturn from the GM pipe, and adding completeAcc()
implementations for the HSAIL mem ops. the behavior in doGmReturn is
dependent on HSAIL and HSAIL mem ops, however the completion phase
of memory ops in machine ISA can be very different, even amongst individual
machine ISA mem ops. so we remove this functionality from the pipeline and
allow it to be implemented by the individual instructions.
H A Dglobal_memory_pipeline.hhdiff 11693:bc1f702c25b9 Wed Oct 26 22:47:00 EDT 2016 Tony Gutierrez <anthony.gutierrez@amd.com> hsail, gpu-compute: remove doGm/SmReturn add completeAcc

we are removing doGmReturn from the GM pipe, and adding completeAcc()
implementations for the HSAIL mem ops. the behavior in doGmReturn is
dependent on HSAIL and HSAIL mem ops, however the completion phase
of memory ops in machine ISA can be very different, even amongst individual
machine ISA mem ops. so we remove this functionality from the pipeline and
allow it to be implemented by the individual instructions.
H A Dlocal_memory_pipeline.ccdiff 11693:bc1f702c25b9 Wed Oct 26 22:47:00 EDT 2016 Tony Gutierrez <anthony.gutierrez@amd.com> hsail, gpu-compute: remove doGm/SmReturn add completeAcc

we are removing doGmReturn from the GM pipe, and adding completeAcc()
implementations for the HSAIL mem ops. the behavior in doGmReturn is
dependent on HSAIL and HSAIL mem ops, however the completion phase
of memory ops in machine ISA can be very different, even amongst individual
machine ISA mem ops. so we remove this functionality from the pipeline and
allow it to be implemented by the individual instructions.
H A Dglobal_memory_pipeline.ccdiff 11693:bc1f702c25b9 Wed Oct 26 22:47:00 EDT 2016 Tony Gutierrez <anthony.gutierrez@amd.com> hsail, gpu-compute: remove doGm/SmReturn add completeAcc

we are removing doGmReturn from the GM pipe, and adding completeAcc()
implementations for the HSAIL mem ops. the behavior in doGmReturn is
dependent on HSAIL and HSAIL mem ops, however the completion phase
of memory ops in machine ISA can be very different, even amongst individual
machine ISA mem ops. so we remove this functionality from the pipeline and
allow it to be implemented by the individual instructions.
H A Dgpu_dyn_inst.ccdiff 11693:bc1f702c25b9 Wed Oct 26 22:47:00 EDT 2016 Tony Gutierrez <anthony.gutierrez@amd.com> hsail, gpu-compute: remove doGm/SmReturn add completeAcc

we are removing doGmReturn from the GM pipe, and adding completeAcc()
implementations for the HSAIL mem ops. the behavior in doGmReturn is
dependent on HSAIL and HSAIL mem ops, however the completion phase
of memory ops in machine ISA can be very different, even amongst individual
machine ISA mem ops. so we remove this functionality from the pipeline and
allow it to be implemented by the individual instructions.
H A Dgpu_dyn_inst.hhdiff 11693:bc1f702c25b9 Wed Oct 26 22:47:00 EDT 2016 Tony Gutierrez <anthony.gutierrez@amd.com> hsail, gpu-compute: remove doGm/SmReturn add completeAcc

we are removing doGmReturn from the GM pipe, and adding completeAcc()
implementations for the HSAIL mem ops. the behavior in doGmReturn is
dependent on HSAIL and HSAIL mem ops, however the completion phase
of memory ops in machine ISA can be very different, even amongst individual
machine ISA mem ops. so we remove this functionality from the pipeline and
allow it to be implemented by the individual instructions.
/gem5/src/arch/hsail/insts/
H A Dmem.hhdiff 11693:bc1f702c25b9 Wed Oct 26 22:47:00 EDT 2016 Tony Gutierrez <anthony.gutierrez@amd.com> hsail, gpu-compute: remove doGm/SmReturn add completeAcc

we are removing doGmReturn from the GM pipe, and adding completeAcc()
implementations for the HSAIL mem ops. the behavior in doGmReturn is
dependent on HSAIL and HSAIL mem ops, however the completion phase
of memory ops in machine ISA can be very different, even amongst individual
machine ISA mem ops. so we remove this functionality from the pipeline and
allow it to be implemented by the individual instructions.

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