111308Santhony.gutierrez@amd.com/*
211308Santhony.gutierrez@amd.com * Copyright (c) 2014-2015 Advanced Micro Devices, Inc.
311308Santhony.gutierrez@amd.com * All rights reserved.
411308Santhony.gutierrez@amd.com *
511308Santhony.gutierrez@amd.com * For use for simulation and test purposes only
611308Santhony.gutierrez@amd.com *
711308Santhony.gutierrez@amd.com * Redistribution and use in source and binary forms, with or without
811308Santhony.gutierrez@amd.com * modification, are permitted provided that the following conditions are met:
911308Santhony.gutierrez@amd.com *
1011308Santhony.gutierrez@amd.com * 1. Redistributions of source code must retain the above copyright notice,
1111308Santhony.gutierrez@amd.com * this list of conditions and the following disclaimer.
1211308Santhony.gutierrez@amd.com *
1311308Santhony.gutierrez@amd.com * 2. Redistributions in binary form must reproduce the above copyright notice,
1411308Santhony.gutierrez@amd.com * this list of conditions and the following disclaimer in the documentation
1511308Santhony.gutierrez@amd.com * and/or other materials provided with the distribution.
1611308Santhony.gutierrez@amd.com *
1712697Santhony.gutierrez@amd.com * 3. Neither the name of the copyright holder nor the names of its
1812697Santhony.gutierrez@amd.com * contributors may be used to endorse or promote products derived from this
1912697Santhony.gutierrez@amd.com * software without specific prior written permission.
2011308Santhony.gutierrez@amd.com *
2111308Santhony.gutierrez@amd.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
2211308Santhony.gutierrez@amd.com * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2311308Santhony.gutierrez@amd.com * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2411308Santhony.gutierrez@amd.com * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
2511308Santhony.gutierrez@amd.com * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2611308Santhony.gutierrez@amd.com * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2711308Santhony.gutierrez@amd.com * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2811308Santhony.gutierrez@amd.com * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2911308Santhony.gutierrez@amd.com * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
3011308Santhony.gutierrez@amd.com * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
3111308Santhony.gutierrez@amd.com * POSSIBILITY OF SUCH DAMAGE.
3211308Santhony.gutierrez@amd.com *
3312697Santhony.gutierrez@amd.com * Authors: John Kalamatianos,
3412697Santhony.gutierrez@amd.com *          Sooraj Puthoor
3511308Santhony.gutierrez@amd.com */
3611308Santhony.gutierrez@amd.com
3711308Santhony.gutierrez@amd.com#ifndef __GLOBAL_MEMORY_PIPELINE_HH__
3811308Santhony.gutierrez@amd.com#define __GLOBAL_MEMORY_PIPELINE_HH__
3911308Santhony.gutierrez@amd.com
4011308Santhony.gutierrez@amd.com#include <queue>
4111308Santhony.gutierrez@amd.com#include <string>
4211308Santhony.gutierrez@amd.com
4311308Santhony.gutierrez@amd.com#include "gpu-compute/misc.hh"
4411308Santhony.gutierrez@amd.com#include "params/ComputeUnit.hh"
4511308Santhony.gutierrez@amd.com#include "sim/stats.hh"
4611308Santhony.gutierrez@amd.com
4711308Santhony.gutierrez@amd.com/*
4811308Santhony.gutierrez@amd.com * @file global_memory_pipeline.hh
4911308Santhony.gutierrez@amd.com *
5011308Santhony.gutierrez@amd.com * The global memory pipeline issues newly created global memory packets
5111308Santhony.gutierrez@amd.com * from the pipeline to DTLB. The exec() method of the memory packet issues
5211308Santhony.gutierrez@amd.com * the packet to the DTLB if there is space available in the return fifo.
5311308Santhony.gutierrez@amd.com * This stage also retires previously issued loads and stores that have
5411308Santhony.gutierrez@amd.com * returned from the memory sub-system.
5511308Santhony.gutierrez@amd.com */
5611308Santhony.gutierrez@amd.com
5711308Santhony.gutierrez@amd.comclass ComputeUnit;
5811308Santhony.gutierrez@amd.com
5911308Santhony.gutierrez@amd.comclass GlobalMemPipeline
6011308Santhony.gutierrez@amd.com{
6111308Santhony.gutierrez@amd.com  public:
6211308Santhony.gutierrez@amd.com    GlobalMemPipeline(const ComputeUnitParams *params);
6311308Santhony.gutierrez@amd.com    void init(ComputeUnit *cu);
6411308Santhony.gutierrez@amd.com    void exec();
6511308Santhony.gutierrez@amd.com
6611308Santhony.gutierrez@amd.com    std::queue<GPUDynInstPtr> &getGMStRespFIFO() { return gmReturnedStores; }
6711308Santhony.gutierrez@amd.com    std::queue<GPUDynInstPtr> &getGMLdRespFIFO() { return gmReturnedLoads; }
6811308Santhony.gutierrez@amd.com
6911700Santhony.gutierrez@amd.com    /**
7011700Santhony.gutierrez@amd.com     * find the next ready response to service. for OoO mode we
7111700Santhony.gutierrez@amd.com     * simply pop the oldest (based on when the response was
7211700Santhony.gutierrez@amd.com     * received) response in the response FIFOs. for in-order mode
7311700Santhony.gutierrez@amd.com     * we pop the oldest (in program order) response, and only if
7411700Santhony.gutierrez@amd.com     * it is marked as done.
7511700Santhony.gutierrez@amd.com     */
7611700Santhony.gutierrez@amd.com    GPUDynInstPtr getNextReadyResp();
7711700Santhony.gutierrez@amd.com
7811700Santhony.gutierrez@amd.com    /**
7911700Santhony.gutierrez@amd.com     * once a memory request is finished we remove it from the
8011700Santhony.gutierrez@amd.com     * buffer. this method determines which response buffer
8111700Santhony.gutierrez@amd.com     * we're using based on the mode (in-order vs. OoO).
8211700Santhony.gutierrez@amd.com     */
8311700Santhony.gutierrez@amd.com    void completeRequest(GPUDynInstPtr gpuDynInst);
8411700Santhony.gutierrez@amd.com
8511700Santhony.gutierrez@amd.com    /**
8611700Santhony.gutierrez@amd.com     * issues a request to the pipeline - i.e., enqueue it
8711700Santhony.gutierrez@amd.com     * in the request buffer.
8811700Santhony.gutierrez@amd.com     */
8911700Santhony.gutierrez@amd.com    void issueRequest(GPUDynInstPtr gpuDynInst);
9011700Santhony.gutierrez@amd.com
9111700Santhony.gutierrez@amd.com    /**
9211700Santhony.gutierrez@amd.com     * this method handles responses sent to this GM pipeline by the
9311700Santhony.gutierrez@amd.com     * CU. in the case of in-order delivery it simply marks the reqeust
9411700Santhony.gutierrez@amd.com     * as done in the ordered buffer to indicate that the requst is
9511700Santhony.gutierrez@amd.com     * finished. for out-of-order data delivery, the requests are enqueued
9611700Santhony.gutierrez@amd.com     * (in the order in which they are received) in the response FIFOs.
9711700Santhony.gutierrez@amd.com     */
9811700Santhony.gutierrez@amd.com    void handleResponse(GPUDynInstPtr gpuDynInst);
9911700Santhony.gutierrez@amd.com
10011308Santhony.gutierrez@amd.com    bool
10111308Santhony.gutierrez@amd.com    isGMLdRespFIFOWrRdy() const
10211308Santhony.gutierrez@amd.com    {
10311308Santhony.gutierrez@amd.com        return gmReturnedLoads.size() < gmQueueSize;
10411308Santhony.gutierrez@amd.com    }
10511308Santhony.gutierrez@amd.com
10611308Santhony.gutierrez@amd.com    bool
10711308Santhony.gutierrez@amd.com    isGMStRespFIFOWrRdy() const
10811308Santhony.gutierrez@amd.com    {
10911308Santhony.gutierrez@amd.com        return gmReturnedStores.size() < gmQueueSize;
11011308Santhony.gutierrez@amd.com    }
11111308Santhony.gutierrez@amd.com
11211308Santhony.gutierrez@amd.com    bool
11311308Santhony.gutierrez@amd.com    isGMReqFIFOWrRdy(uint32_t pendReqs=0) const
11411308Santhony.gutierrez@amd.com    {
11511308Santhony.gutierrez@amd.com        return (gmIssuedRequests.size() + pendReqs) < gmQueueSize;
11611308Santhony.gutierrez@amd.com    }
11711308Santhony.gutierrez@amd.com
11811308Santhony.gutierrez@amd.com    const std::string &name() const { return _name; }
11911308Santhony.gutierrez@amd.com    void regStats();
12011308Santhony.gutierrez@amd.com
12111693Santhony.gutierrez@amd.com    void
12211693Santhony.gutierrez@amd.com    incLoadVRFBankConflictCycles(int num_cycles)
12311693Santhony.gutierrez@amd.com    {
12411693Santhony.gutierrez@amd.com        loadVrfBankConflictCycles += num_cycles;
12511693Santhony.gutierrez@amd.com    }
12611693Santhony.gutierrez@amd.com
12711308Santhony.gutierrez@amd.com  private:
12811308Santhony.gutierrez@amd.com    ComputeUnit *computeUnit;
12911308Santhony.gutierrez@amd.com    std::string _name;
13011308Santhony.gutierrez@amd.com    int gmQueueSize;
13111700Santhony.gutierrez@amd.com    bool outOfOrderDataDelivery;
13211308Santhony.gutierrez@amd.com
13311308Santhony.gutierrez@amd.com    // number of cycles of delaying the update of a VGPR that is the
13411308Santhony.gutierrez@amd.com    // target of a load instruction (or the load component of an atomic)
13511308Santhony.gutierrez@amd.com    // The delay is due to VRF bank conflicts
13611308Santhony.gutierrez@amd.com    Stats::Scalar loadVrfBankConflictCycles;
13711308Santhony.gutierrez@amd.com    // Counters to track the inflight loads and stores
13811308Santhony.gutierrez@amd.com    // so that we can provide the proper backpressure
13911308Santhony.gutierrez@amd.com    // on the number of inflight memory operations.
14011308Santhony.gutierrez@amd.com    int inflightStores;
14111308Santhony.gutierrez@amd.com    int inflightLoads;
14211308Santhony.gutierrez@amd.com
14311308Santhony.gutierrez@amd.com    // The size of global memory.
14411308Santhony.gutierrez@amd.com    int globalMemSize;
14511308Santhony.gutierrez@amd.com
14611700Santhony.gutierrez@amd.com    /*
14711700Santhony.gutierrez@amd.com     * this buffer holds the memory responses when in-order data
14811700Santhony.gutierrez@amd.com     * deilvery is used - the responses are ordered by their unique
14911700Santhony.gutierrez@amd.com     * sequence number, which is monotonically increasing. when a
15011700Santhony.gutierrez@amd.com     * memory request returns its "done" flag is set to true. during
15111700Santhony.gutierrez@amd.com     * each tick the the GM pipeline will check if the oldest request
15211700Santhony.gutierrez@amd.com     * is finished, and if so it will be removed from the queue.
15311700Santhony.gutierrez@amd.com     *
15411700Santhony.gutierrez@amd.com     * key:   memory instruction's sequence ID
15511700Santhony.gutierrez@amd.com     *
15611700Santhony.gutierrez@amd.com     * value: pair holding the instruction pointer and a bool that
15711700Santhony.gutierrez@amd.com     *        is used to indicate whether or not the request has
15811700Santhony.gutierrez@amd.com     *        completed
15911700Santhony.gutierrez@amd.com     */
16011700Santhony.gutierrez@amd.com    std::map<uint64_t, std::pair<GPUDynInstPtr, bool>> gmOrderedRespBuffer;
16111700Santhony.gutierrez@amd.com
16211308Santhony.gutierrez@amd.com    // Global Memory Request FIFO: all global memory requests
16311308Santhony.gutierrez@amd.com    // are issued to this FIFO from the memory pipelines
16411308Santhony.gutierrez@amd.com    std::queue<GPUDynInstPtr> gmIssuedRequests;
16511308Santhony.gutierrez@amd.com
16611308Santhony.gutierrez@amd.com    // Globa Store Response FIFO: all responses of global memory
16711308Santhony.gutierrez@amd.com    // stores are sent to this FIFO from TCP
16811308Santhony.gutierrez@amd.com    std::queue<GPUDynInstPtr> gmReturnedStores;
16911308Santhony.gutierrez@amd.com
17011308Santhony.gutierrez@amd.com    // Global Load Response FIFO: all responses of global memory
17111308Santhony.gutierrez@amd.com    // loads are sent to this FIFO from TCP
17211308Santhony.gutierrez@amd.com    std::queue<GPUDynInstPtr> gmReturnedLoads;
17311308Santhony.gutierrez@amd.com};
17411308Santhony.gutierrez@amd.com
17511308Santhony.gutierrez@amd.com#endif // __GLOBAL_MEMORY_PIPELINE_HH__
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