Searched hist:10854 (Results 1 - 5 of 5) sorted by relevance

/gem5/src/systemc/ext/core/
H A Dsc_module.hhdiff 12864:7f28dd4f33ac Wed Jun 06 16:57:00 EDT 2018 Gabe Black <gabeblack@google.com> systemc: Add the deprecated sc_module::end_module function.

The regression tests use this function. In the Accellera implementation
it seems to just do some error checking, so our version doesn't do
anything for now.

Change-Id: Icaad45e934bad69e301bc0234f73e69791940736
Reviewed-on: https://gem5-review.googlesource.com/10854
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
/gem5/src/arch/arm/
H A Dtlb.hhdiff 10854:f449d6f8a647 Tue May 26 03:21:00 EDT 2015 Nathanael Premillieu <Nathanael.Premillieu@arm.com> arm: Make address translation faster with better caching

This patch adds better caching of the sys regs for AArch64, thus
avoiding unnecessary calls to tc->readMiscReg(MISCREG_CPSR) in the
non-faulting case.
H A Dutility.ccdiff 10854:f449d6f8a647 Tue May 26 03:21:00 EDT 2015 Nathanael Premillieu <Nathanael.Premillieu@arm.com> arm: Make address translation faster with better caching

This patch adds better caching of the sys regs for AArch64, thus
avoiding unnecessary calls to tc->readMiscReg(MISCREG_CPSR) in the
non-faulting case.
H A Dutility.hhdiff 10854:f449d6f8a647 Tue May 26 03:21:00 EDT 2015 Nathanael Premillieu <Nathanael.Premillieu@arm.com> arm: Make address translation faster with better caching

This patch adds better caching of the sys regs for AArch64, thus
avoiding unnecessary calls to tc->readMiscReg(MISCREG_CPSR) in the
non-faulting case.
H A Dtlb.ccdiff 10854:f449d6f8a647 Tue May 26 03:21:00 EDT 2015 Nathanael Premillieu <Nathanael.Premillieu@arm.com> arm: Make address translation faster with better caching

This patch adds better caching of the sys regs for AArch64, thus
avoiding unnecessary calls to tc->readMiscReg(MISCREG_CPSR) in the
non-faulting case.

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