| /gem5/ext/nomali/lib/ |
| H A D | mali_midgard.hh | 52 void reset() override; member in class:NoMali::MaliMidgard::GPUControlSpec
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| /gem5/src/base/ |
| H A D | pollevent.hh | 63 void serialize(CheckpointOut &cp) const override; member in class:PollEvent
64 void unserialize(CheckpointIn &cp) override; member in class:PollEvent
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| H A D | pngwriter.hh | 78 void write(std::ostream &png) const override; member in class:PngWriter
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| H A D | framebuffer.hh | 82 void serialize(CheckpointOut &cp) const override; member in class:FrameBuffer
83 void unserialize(CheckpointIn &cp) override; member in class:FrameBuffer
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| /gem5/src/dev/alpha/ |
| H A D | tsunami.hh | 83 void init() override; member in class:Tsunami
89 void serialize(CheckpointOut &cp) const override; member in class:Tsunami
90 void unserialize(CheckpointIn &cp) override; member in class:Tsunami
93 void postConsoleInt() override; member in class:Tsunami
94 void clearConsoleInt() override; member in class:Tsunami
96 void postPciInt(int line) override; member in class:Tsunami
97 void clearPciInt(int line) override; member in class:Tsunami
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| H A D | backdoor.hh | 79 void serialize(CheckpointOut &cp) const override; member in struct:AlphaBackdoor::Access
80 void unserialize(CheckpointIn &cp) override; member in struct:AlphaBackdoor::Access
110 void startup() override; member in class:AlphaBackdoor
115 Tick read(PacketPtr pkt) override; member in class:AlphaBackdoor
116 Tick write(PacketPtr pkt) override; member in class:AlphaBackdoor
121 void serialize(CheckpointOut &cp) const override; member in class:AlphaBackdoor
122 void unserialize(CheckpointIn &cp) override; member in class:AlphaBackdoor
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| H A D | tsunami_pchip.hh | 76 void serialize(CheckpointOut &cp) const override; member in class:TsunamiPChip
77 void unserialize(CheckpointIn &cp) override; member in class:TsunamiPChip
80 Tick read(PacketPtr pkt) override; member in class:TsunamiPChip
81 Tick write(PacketPtr pkt) override; member in class:TsunamiPChip
83 AddrRangeList getAddrRanges() const override; member in class:TsunamiPChip
91 Addr dmaAddr(const PciBusAddr &addr, Addr pci_addr) const override; member in class:TsunamiPChip
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| H A D | tsunami_cchip.hh | 95 Tick read(PacketPtr pkt) override; member in class:TsunamiCChip
97 Tick write(PacketPtr pkt) override; member in class:TsunamiCChip
134 void serialize(CheckpointOut &cp) const override; member in class:TsunamiCChip
135 void unserialize(CheckpointIn &cp) override; member in class:TsunamiCChip
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| /gem5/src/dev/x86/ |
| H A D | speaker.hh | 72 Tick read(PacketPtr pkt) override; member in class:X86ISA::Speaker
74 Tick write(PacketPtr pkt) override; member in class:X86ISA::Speaker
76 void serialize(CheckpointOut &cp) const override; member in class:X86ISA::Speaker
77 void unserialize(CheckpointIn &cp) override; member in class:X86ISA::Speaker
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| /gem5/src/mem/probes/ |
| H A D | stack_dist.hh | 55 void regStats() override; member in class:StackDistProbe
58 void handleRequest(const ProbePoints::PacketInfo &pkt_info) override; member in class:StackDistProbe
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| /gem5/src/sim/ |
| H A D | voltage_domain.hh | 114 void startup() override; member in class:VoltageDomain
129 void regStats() override; member in class:VoltageDomain
131 void serialize(CheckpointOut &cp) const override; member in class:VoltageDomain
132 void unserialize(CheckpointIn &cp) override; member in class:VoltageDomain
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| /gem5/src/dev/arm/ |
| H A D | gpu_nomali.hh | 58 void init() override; member in class:NoMaliGpu
61 void serialize(CheckpointOut &cp) const override; member in class:NoMaliGpu
62 void unserialize(CheckpointIn &cp) override; member in class:NoMaliGpu
65 Tick read(PacketPtr pkt) override; member in class:NoMaliGpu
66 Tick write(PacketPtr pkt) override; member in class:NoMaliGpu
67 AddrRangeList getAddrRanges() const override; member in class:NoMaliGpu
197 void onReset() override; member in class:CustomNoMaliGpu
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| /gem5/src/sim/power/ |
| H A D | thermal_domain.hh | 86 double step) const override; member in class:ThermalDomain
98 void regStats() override; member in class:ThermalDomain
99 void serialize(CheckpointOut &cp) const override; member in class:ThermalDomain
100 void unserialize(CheckpointIn &cp) override; member in class:ThermalDomain
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| /gem5/util/tlm/src/ |
| H A D | sim_control.hh | 119 SCSlavePort* getSlavePort(const std::string& name) override; member in class:Gem5SystemC::Gem5SimControl
120 SCMasterPort* getMasterPort(const std::string& name) override; member in class:Gem5SystemC::Gem5SimControl
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| /gem5/src/arch/sparc/insts/ |
| H A D | blockmem.hh | 70 Addr pc, const SymbolTable *symtab) const override; member in class:SparcISA::BlockMemMicro
85 Addr pc, const SymbolTable *symtab) const override; member in class:SparcISA::BlockMemImmMicro
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| H A D | branch.hh | 54 Addr pc, const SymbolTable *symtab) const override; member in class:SparcISA::Branch
69 Addr pc, const SymbolTable *symtab) const override; member in class:SparcISA::BranchDisp
116 Addr pc, const SymbolTable *symtab) const override; member in class:SparcISA::BranchImm13
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| H A D | integer.hh | 55 Addr pc, const SymbolTable *symtab) const override; member in class:SparcISA::IntOp
76 Addr pc, const SymbolTable *symtab) const override; member in class:SparcISA::IntOpImm
79 const SymbolTable *symtab) const override; member in class:SparcISA::IntOpImm
128 Addr pc, const SymbolTable *symtab) const override; member in class:SparcISA::SetHi
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| H A D | micro.hh | 61 Addr pc, const SymbolTable *symtab) const override; member in class:SparcISA::SparcMacroInst
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| /gem5/src/arch/riscv/insts/ |
| H A D | mem.hh | 61 Addr pc, const SymbolTable *symtab) const override; member in class:RiscvISA::Load
70 Addr pc, const SymbolTable *symtab) const override; member in class:RiscvISA::Store
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| H A D | standard.hh | 54 Addr pc, const SymbolTable *symtab) const override; member in class:RiscvISA::RegOp
102 Addr pc, const SymbolTable *symtab) const override; member in class:RiscvISA::CSROp
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| H A D | static_inst.hh | 120 void advancePC(PCState &pcState) const override; member in class:RiscvISA::RiscvMicroInst
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| /gem5/src/arch/alpha/ |
| H A D | remote_gdb.hh | 53 bool acc(Addr addr, size_t len) override; member in class:AlphaISA::RemoteGDB
79 BaseGdbRegCache *gdbRegs() override; member in class:AlphaISA::RemoteGDB
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| /gem5/src/arch/arm/kvm/ |
| H A D | gic.hh | 121 uint32_t readDistributor(ContextID ctx, Addr daddr) override; member in class:KvmKernelGicV2
122 uint32_t readCpu(ContextID ctx, Addr daddr) override; member in class:KvmKernelGicV2
125 uint32_t data) override; member in class:KvmKernelGicV2
126 void writeCpu(ContextID ctx, Addr daddr, uint32_t data) override; member in class:KvmKernelGicV2
177 void startup() override; member in class:MuxingKvmGic
178 DrainState drain() override; member in class:MuxingKvmGic
179 void drainResume() override; member in class:MuxingKvmGic
182 Tick read(PacketPtr pkt) override; member in class:MuxingKvmGic
183 Tick write(PacketPtr pkt) override; member in class:MuxingKvmGic
186 void sendInt(uint32_t num) override; member in class:MuxingKvmGic
187 void clearInt(uint32_t num) override; member in class:MuxingKvmGic
189 void sendPPInt(uint32_t num, uint32_t cpu) override; member in class:MuxingKvmGic
190 void clearPPInt(uint32_t num, uint32_t cpu) override; member in class:MuxingKvmGic
193 void updateIntState(int hint) override; member in class:MuxingKvmGic
[all...] |
| /gem5/src/arch/power/insts/ |
| H A D | condition.hh | 61 Addr pc, const SymbolTable *symtab) const override; member in class:PowerISA::CondLogicOp
83 Addr pc, const SymbolTable *symtab) const override; member in class:PowerISA::CondMoveOp
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| H A D | static_inst.hh | 65 Addr pc, const SymbolTable *symtab) const override; member in class:PowerISA::PowerStaticInst
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