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14097:1f8f4c773c49 |
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27-Feb-2019 |
Pouya Fotouhi <pfotouhi@ucdavis.edu> |
mem-ruby: Adding a new slicc statement - to not evict locked cachelines
Ruby caches block incoming ports with messages on a locked address to make sure the line would not be replaced by others. But they do not check the lock upon capacity/conflict misses.
This change adds a new slicc statement "check_on_cache_probe" which takes two arguments (mandatoryQueue for the controller, and the line subject to eviction - i.e. address returned by cacheProbe). If the line is locked, incoming message is delayed for 1 cycle and the controller skips this request (i.e. does not trigger an event).
Coherence protocols should be updated accordingly. One use case for MESI Two Level will be added in a separate change.
Signed-off-by: Pouya Fotouhi <pfotouhi@ucdavis.edu> Change-Id: I79ca2d45518de7a4e382b520a11f8e221b0cb803 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/16808 Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Srikant Bharadwaj <srikant.bharadwaj@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
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11888:d89dc575c7cb |
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05-Feb-2017 |
Lena Olson <leolson@google.com> |
ruby: fix and/or precedence in slicc
The slicc compiler currently treats && and || with the same precedence. This is highly non-intuitive to people used to C, and was probably an error. This patch makes && bind tighter than ||.
For example, previously: if (A || B && C) compiled to: if ((A || B) && C) With this patch, it compiles to: if (A || (B && C))
Change-Id: Idbbd5b50cc86a8d6601045adc14a253284d7b791 Signed-off-by: Lena Olson (leolson@google.com) Reviewed-on: https://gem5-review.googlesource.com/2168 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Joe Gross <criusx@gmail.com> Reviewed-by: Sooraj Puthoor <puthoorsooraj@gmail.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> [ Rebased onto master ] Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
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11283:4cc8b312f026 |
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20-Jul-2015 |
Tony Gutierrez <anthony.gutierrez@amd.com> |
ruby: slicc: have a static MachineType
This patch is imported from reviewboard patch 2551 by Nilay. This patch moves from a dynamically defined MachineType to a statically defined one. The need for this patch was felt since a dynamically defined type prevents us from having types for which no machine definition may exist.
The following changes have been made: i. each machine definition now uses a type from the MachineType enumeration instead of any random identifier. This required changing the grammar and the *.sm files. ii. MachineType enumeration defined statically in RubySlicc_Exports.sm. * * * normal protocol fixes for nilay's parser machine type fix
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11282:afdcebd314be |
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20-Jul-2015 |
Tony Gutierrez <anthony.gutierrez@amd.com> |
ruby: slicc: remove support for single machine, multiple types
This patch is imported from reviewboard patch 2550 by Nilay. It was possible to specify multiple machine types with a single state machine. This seems unnecessary and is being removed.
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11062:262d8494b253 |
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30-Aug-2015 |
Nilay Vaish <nilay@cs.wisc.edu> |
ruby: slicc: avoid duplicate code for function argument check Both FuncCallExprAST and MethodCallExprAST had code for checking the arguments with which a function is being called. The patch does away with this duplication. Now the code for checking function call arguments resides in the Func class.
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11049:dfb0aa3f0649 |
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19-Aug-2015 |
Nilay Vaish <nilay@cs.wisc.edu> |
ruby: reverts to changeset: bf82f1f7b040
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11029:32604f9e190b |
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14-Aug-2015 |
Nilay Vaish <nilay@cs.wisc.edu> |
ruby: slicc: avoid duplicate code for function argument check Both FuncCallExprAST and MethodCallExprAST had code for checking the arguments with which a function is being called. The patch does away with this duplication. Now the code for checking function call arguments resides in the Func class.
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11028:3a5190683bf2 |
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14-Aug-2015 |
Nilay Vaish <nilay@cs.wisc.edu> |
ruby: drop the [] notation for lookup function.
This is in preparation for adding a second arugment to the lookup function for the CacheMemory class. The change to *.sm files was made using the following sed command:
sed -i 's/\[\([0-9A-Za-z._()]*\)\]/.lookup(\1)/' src/mem/protocol/*.sm
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10981:b300dcda5896 |
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20-Jul-2015 |
Brad Beckmann <Brad.Beckmann@amd.com> |
slicc: improved stalling support in protocols
Adds features to allow protocols to reschedule controllers when conditionally stalling within inport logic or actions. Also insures that resource and protocol stalls are re-evaluated the next cycle.
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10964:2b4fe083d17b |
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20-Jul-2015 |
David Hashe <david.hashe@amd.com> |
slicc: support for transitions with a wildcard next state
This patches adds support for transitions of the form:
transition(START, EVENTS, *) { ACTIONS }
This allows a machine to collapse states that differ only in the next state transition to collapse into one, and can help shorten/simplfy some protocols significantly.
When * is encountered as an end state of a transition, the next state is determined by calling the machine-specific getNextState function. The next state is determined before any actions of the transition execute, and therefore the next state calculation cannot depend on any of the transition actions.
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10308:8c0870dbae5c |
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01-Sep-2014 |
Nilay Vaish <nilay@cs.wisc.edu> |
ruby: slicc: change the way configurable members are specified There are two changes this patch makes to the way configurable members of a state machine are specified in SLICC. The first change is that the data member declarations will need to be separated by a semi-colon instead of a comma. Secondly, the default value to be assigned would now use SLICC's assignment operator i.e. ':='.
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10307:6df951dcd7d9 |
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01-Sep-2014 |
Nilay Vaish <nilay@cs.wisc.edu> |
ruby: slicc: improve the grammar This patch changes the grammar for SLICC so as to remove some of the redundant / duplicate rules. In particular rules for object/variable declaration and class member declaration have been unified. Similarly, the rules for a general function and a class method have been unified.
One more change is in the priority of two rules. The first rule is on declaring a function with all the params typed and named. The second rule is on declaring a function with all the params only typed. Earlier the second rule had a higher priority. Now the first rule has a higher priority.
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10165:7e9edf4297a9 |
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19-Apr-2014 |
Nilay Vaish <nilay@cs.wisc.edu> |
ruby: slicc: slight change to rule for transitions It had an unnecessary pairs token which is being removed.
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10155:3b0bcc8c34ca |
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08-Apr-2014 |
Nilay Vaish <nilay@cs.wisc.edu> |
ruby: slicc: change enqueue statement As of now, the enqueue statement can take in any number of 'pairs' as argument. But we only use the pair in which latency is the key. This latency is allowed to be either a fixed integer or a member variable of controller in which the expression appears. This patch drops the use of pairs in an enqueue statement. Instead, an expression is allowed which will be interpreted to be the latency of the enqueue. This expression can anything allowed by slicc including a constant integer or a member variable.
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10085:b9891fbae4c8 |
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23-Feb-2014 |
Nilay Vaish <nilay@cs.wisc.edu> |
ruby: slicc: remove unused COPY_HEAD functionality
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9773:915be89faf30 |
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25-Jun-2013 |
Nilay Vaish <nilay@cs.wisc.edu> |
ruby: profiler: lots of inter-related changes The patch started of with removing the global variables from the profiler for profiling the miss latency of requests made to the cache. The corrresponding histograms have been moved to the Sequencer. These are combined together when the histograms are printed. Separate histograms are now maintained for tracking latency of all requests together, of hits only and of misses only.
A particular set of histograms used to use the type GenericMachineType defined in one of the protocol files. This patch removes this type. Now, everything that relied on this type would use MachineType instead. To do this, SLICC has been changed so that multiple machine types can be declared by a controller in its preamble.
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9692:67d9da312ef0 |
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21-May-2013 |
Nilay Vaish <nilay@cs.wisc.edu>, Malek Musleh <malek.musleh@gmail.com> |
ruby: add stats to .sm files, remove cache profiler This patch changes the way cache statistics are collected in ruby.
As of now, there is separate entity called CacheProfiler which holds statistical variables for caches. The CacheMemory class defines different functions for accessing the CacheProfiler. These functions are then invoked in the .sm files. I find this approach opaque and prone to error. Secondly, we probably should not be paying the cost of a function call for recording statistics.
Instead, this patch allows for accessing statistical variables in the .sm files. The collection would become transparent. Secondly, it would happen in place, so no function calls. The patch also removes the CacheProfiler class.
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9298:9a087e046c58 |
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15-Oct-2012 |
Nilay Vaish <nilay@cs.wisc.edu> |
ruby: allow function definition in slicc structs This patch adds support for function definitions to appear in slicc structs. This is required for supporting functional accesses for different types of messages. Subsequent patches will use this to development.
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9271:3859f5d4f2c6 |
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02-Oct-2012 |
Nilay Vaish <nilay@cs.wisc.edu> |
ruby: remove some unused things in slicc This patch removes the parts of slicc that were required for multi-chip protocols. Going ahead, it seems multi-chip protocols would be implemented by playing with the network itself.
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9219:258753d3bc47 |
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12-Sep-2012 |
Jason Power <power.jg@gmail.com> |
Ruby: Modify Scons so that we can put .sm files in extras Also allows for header files which are required in slicc generated code to be in a directory other than src/mem/ruby/slicc_interface.
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9104:27d56b644e78 |
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11-Jul-2012 |
Joel Hestness <hestness@cs.utexas.edu> |
ruby: tag and data cache access support
Updates to Ruby to support statistics counting of cache accesses. This feature serves multiple purposes beyond simple stats collection. It provides the foundation for ruby to model the cache tag and data arrays as physical resources, as well as provide the necessary input data for McPAT power modeling.
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8454:fad37c6670a6 |
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05-Jul-2011 |
Nathan Binkert <nate@binkert.org> |
slicc: add a protocol statement and an include statement All protocols must specify their name The include statement allows any file to include another file.
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8453:82fc1267d3bb |
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05-Jul-2011 |
Nathan Binkert <nate@binkert.org> |
slicc: cleanup slicc code and make it less verbose
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8452:3f2c329e9046 |
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05-Jul-2011 |
Nathan Binkert <nate@binkert.org> |
grammar: better encapsulation of a grammar and parsing This makes it possible to use the grammar multiple times and use the multiple instances concurrently. This makes implementing an include statement as part of a grammar possible.
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8156:9a6a02a235f1 |
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18-Mar-2011 |
Nilay Vaish<nilay@cs.wisc.edu> |
SLICC: Remove external_type for structures In SLICC, in order to define a type a data type for which it should not generate any code, the keyword external_type is used. For those data types for which code should be generated, the keyword structure is used. This patch eliminates the use of keyword external_type for defining structures. structure key word can now have an optional attribute external, which would be used for figuring out whether or not to generate the code for this structure. Also, now structures can have functions as well data members in them.
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8155:099771c7725d |
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18-Mar-2011 |
Nilay Vaish<nilay@cs.wisc.edu> |
SLICC: Remove the keyword wake_up_dependents In order to add stall and wait facility for protocols, a keyword wake_up_dependents was introduced. This patch removes the keyword, instead this functionality is now implemented as function call.
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8154:f3d1493787d4 |
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18-Mar-2011 |
Nilay Vaish<nilay@cs.wisc.edu> |
SLICC: Remove the keyword wake_up_all_dependents In order to add stall and wait facility for protocols, a keyword wake_up_all_dependents was introduced. This patch removes the keyword, instead this functionality is now implemented as function call.
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8086:bf0335d98250 |
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23-Feb-2011 |
Brad Beckmann <Brad.Beckmann@amd.com> |
ruby: automate permission setting
This patch integrates permissions with cache and memory states, and then automates the setting of permissions within the generated code. No longer does one need to manually set the permissions within the setState funciton. This patch will faciliate easier functional access support by always correctly setting permissions for both cache and memory states.
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7922:7532067f818e |
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07-Feb-2011 |
Brad Beckmann <Brad.Beckmann@amd.com> |
ruby: support to stallAndWait the mandatory queue
By stalling and waiting the mandatory queue instead of recycling it, one can ensure that no incoming messages are starved when the mandatory queue puts signficant of pressure on the L1 cache controller (i.e. the ruby memtester).
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7839:9e556fb25900 |
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17-Jan-2011 |
Nilay Vaish<nilay@cs.wisc.edu> |
Change interface between coherence protocols and CacheMemory The purpose of this patch is to change the way CacheMemory interfaces with coherence protocols. Currently, whenever a cache controller (defined in the protocol under consideration) needs to carry out any operation on a cache block, it looks up the tag hash map and figures out whether or not the block exists in the cache. In case it does exist, the operation is carried out (which requires another lookup). As observed through profiling of different protocols, multiple such lookups take place for a given cache block. It was noted that the tag lookup takes anything from 10% to 20% of the simulation time. In order to reduce this time, this patch is being posted.
I have to acknowledge that the many of the thoughts that went in to this patch belong to Brad.
Changes to CacheMemory, TBETable and AbstractCacheEntry classes: 1. The lookup function belonging to CacheMemory class now returns a pointer to a cache block entry, instead of a reference. The pointer is NULL in case the block being looked up is not present in the cache. Similar change has been carried out in the lookup function of the TBETable class. 2. Function for setting and getting access permission of a cache block have been moved from CacheMemory class to AbstractCacheEntry class. 3. The allocate function in CacheMemory class now returns pointer to the allocated cache entry.
Changes to SLICC: 1. Each action now has implicit variables - cache_entry and tbe. cache_entry, if != NULL, must point to the cache entry for the address on which the action is being carried out. Similarly, tbe should also point to the transaction buffer entry of the address on which the action is being carried out. 2. If a cache entry or a transaction buffer entry is passed on as an argument to a function, it is presumed that a pointer is being passed on. 3. The cache entry and the tbe pointers received __implicitly__ by the actions, are passed __explicitly__ to the trigger function. 4. While performing an action, set/unset_cache_entry, set/unset_tbe are to be used for setting / unsetting cache entry and tbe pointers respectively. 5. is_valid() and is_invalid() has been made available for testing whether a given pointer 'is not NULL' and 'is NULL' respectively. 6. Local variables are now available, but they are assumed to be pointers always. 7. It is now possible for an object of the derieved class to make calls to a function defined in the interface. 8. An OOD token has been introduced in SLICC. It is same as the NULL token used in C/C++. If you are wondering, OOD stands for Out Of Domain. 9. static_cast can now taken an optional parameter that asks for casting the given variable to a pointer of the given type. 10. Functions can be annotated with 'return_by_pointer=yes' to return a pointer. 11. StateMachine has two new variables, EntryType and TBEType. EntryType is set to the type which inherits from 'AbstractCacheEntry'. There can only be one such type in the machine. TBEType is set to the type for which 'TBE' is used as the name.
All the protocols have been modified to conform with the new interface.
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7567:238f99c9f441 |
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20-Aug-2010 |
Brad Beckmann <Brad.Beckmann@amd.com> |
ruby: Stall and wait input messages instead of recycling
This patch allows messages to be stalled in their input buffers and wait until a corresponding address changes state. In order to make this work, all in_ports must be ranked in order of dependence and those in_ports that may unblock an address, must wake up the stalled messages. Alot of this complexity is handled in slicc and the specification files simply annotate the in_ports.
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7055:4e24742201d7 |
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02-Apr-2010 |
Nathan Binkert <nate@binkert.org> |
ruby: get "using namespace" out of headers In addition to obvious changes, this required a slight change to the slicc grammar to allow types with :: in them. Otherwise slicc barfs on std::string which we need for the headers that slicc generates.
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6999:f226c098c393 |
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10-Mar-2010 |
Nathan Binkert <nate@binkert.org> |
slicc: have a central mechanism for creating a code_formatter. This makes it easier to add global variables like protocol
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6907:b05de761960e |
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29-Jan-2010 |
Brad Beckmann <Brad.Beckmann@amd.com> |
ruby: Allows boolean and string defaults for StateMachine parameters
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6882:898047a3672c |
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29-Jan-2010 |
Brad Beckmann <Brad.Beckmann@amd.com> |
ruby: Ruby changes required to use the python config system This patch includes the necessary changes to connect ruby objects using the python configuration system. Mainly it consists of removing unnecessary ruby object pointers and connecting the necessary object pointers using the generated param objects. This patch includes the slicc changes necessary to connect generated ruby objects together using the python configuraiton system.
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6877:2a1a3d916ca8 |
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29-Jan-2010 |
Steve Reinhardt <steve.reinhardt@amd.com> |
ruby: Make SLICC-generated objects SimObjects. Also add SLICC support for state-machine parameter defaults (passed through to Python as SimObject Param defaults).
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6863:21fbf0412e0d |
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19-Jan-2010 |
Derek Hower <drh5@cs.wisc.edu> |
ruby: new atomics implementation
This patch changes the way that Ruby handles atomic RMW instructions. This implementation, unlike the prior one, is protocol independent. It works by locking an address from the sequencer immediately after the read portion of an RMW completes. When that address is locked, the coherence controller will only satisfy requests coming from one port (e.g., the mandatory queue) and will ignore all others. After the write portion completed, the line is unlocked. This should also work with multi-line atomics, as long as the blocks are always acquired in the same order.
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6714:028047200ff7 |
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05-Nov-2009 |
Steve Reinhardt <steve.reinhardt@amd.com> |
slicc: tweak file enumeration for scons Right now .cc and .hh files are handled separately, but then they're just munged together at the end by scons, so it doesn't buy us anything. Might as well munge from the start since we'll eventually be adding generated Python files to the list too.
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6657:ef5fae93a3b2 |
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22-Sep-2009 |
Nathan Binkert <nate@binkert.org> |
slicc: Pure python implementation of slicc. This is simply a translation of the C++ slicc into python with very minimal reorganization of the code. The output can be verified as nearly identical by doing a "diff -wBur".
Slicc can easily be run manually by using util/slicc
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