switcheroo.py (9447:156f74caf0d4) switcheroo.py (9521:1cd02decbfd3)
1# Copyright (c) 2012 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

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35#
36# Authors: Andreas Sandberg
37
38import m5
39from m5.objects import *
40m5.util.addToPath('../configs/common')
41from Caches import *
42
1# Copyright (c) 2012 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

--- 26 unchanged lines hidden (view full) ---

35#
36# Authors: Andreas Sandberg
37
38import m5
39from m5.objects import *
40m5.util.addToPath('../configs/common')
41from Caches import *
42
43def _memMode(cclass):
44 if cclass == AtomicSimpleCPU:
45 return "atomic", m5.objects.params.atomic
46 else:
47 return "timing", m5.objects.params.timing
48
49class Sequential:
50 """Sequential CPU switcher.
51
52 The sequential CPU switches between all CPUs in a system in
53 order. The CPUs in the system must have been prepared for
54 switching, which in practice means that only one CPU is switched
55 in. base_config.BaseFSSwitcheroo can be used to create such a
56 system.

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99 period -- Switching frequency in Hz.
100 """
101
102 if switcher == None:
103 switcher = Sequential(root.system.cpu)
104
105 current_cpu = switcher.first()
106 system = root.system
43class Sequential:
44 """Sequential CPU switcher.
45
46 The sequential CPU switches between all CPUs in a system in
47 order. The CPUs in the system must have been prepared for
48 switching, which in practice means that only one CPU is switched
49 in. base_config.BaseFSSwitcheroo can be used to create such a
50 system.

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93 period -- Switching frequency in Hz.
94 """
95
96 if switcher == None:
97 switcher = Sequential(root.system.cpu)
98
99 current_cpu = switcher.first()
100 system = root.system
107 system.mem_mode = _memMode(type(current_cpu))[0]
101 system.mem_mode = type(current_cpu).memory_mode()
108
109 # instantiate configuration
110 m5.instantiate()
111
112 # Determine the switching period, this has to be done after
113 # instantiating the system since the time base must be fixed.
114 period = m5.ticks.fromSeconds(1.0 / freq)
115 while True:
116 exit_event = m5.simulate(period)
117 exit_cause = exit_event.getCause()
118
119 if exit_cause == "simulate() limit reached":
120 next_cpu = switcher.next()
121
122 print "Switching CPUs..."
123 print "Next CPU: %s" % type(next_cpu)
124 m5.drain(system)
102
103 # instantiate configuration
104 m5.instantiate()
105
106 # Determine the switching period, this has to be done after
107 # instantiating the system since the time base must be fixed.
108 period = m5.ticks.fromSeconds(1.0 / freq)
109 while True:
110 exit_event = m5.simulate(period)
111 exit_cause = exit_event.getCause()
112
113 if exit_cause == "simulate() limit reached":
114 next_cpu = switcher.next()
115
116 print "Switching CPUs..."
117 print "Next CPU: %s" % type(next_cpu)
118 m5.drain(system)
125 system.setMemoryMode(_memMode(type(next_cpu))[1])
126 if current_cpu != next_cpu:
119 if current_cpu != next_cpu:
127 m5.switchCpus([ (current_cpu, next_cpu) ])
120 m5.switchCpus(system, [ (current_cpu, next_cpu) ],
121 do_drain=False)
128 else:
129 print "Source CPU and destination CPU are the same, skipping..."
130 m5.resume(system)
131 current_cpu = next_cpu
132 elif exit_cause == "target called exit()" or \
133 exit_cause == "m5_exit instruction encountered":
134
135 sys.exit(0)
136 else:
137 print "Test failed: Unknown exit cause: %s" % exit_cause
138 sys.exit(1)
122 else:
123 print "Source CPU and destination CPU are the same, skipping..."
124 m5.resume(system)
125 current_cpu = next_cpu
126 elif exit_cause == "target called exit()" or \
127 exit_cause == "m5_exit instruction encountered":
128
129 sys.exit(0)
130 else:
131 print "Test failed: Unknown exit cause: %s" % exit_cause
132 sys.exit(1)