1# Copyright (c) 2012 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 21 unchanged lines hidden (view full) --- 30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35# 36# Authors: Andreas Sandberg 37 |
38from __future__ import print_function 39 |
40import m5 41import _m5 42from m5.objects import * 43m5.util.addToPath('../configs/') 44from common.Caches import * 45 46class Sequential: 47 """Sequential CPU switcher. --- 71 unchanged lines hidden (view full) --- 119 while True: 120 exit_event = m5.simulate(period) 121 exit_cause = exit_event.getCause() 122 123 if exit_cause == "simulate() limit reached": 124 next_cpu = switcher.next() 125 126 if verbose: |
127 print("Switching CPUs...") 128 print("Next CPU: %s" % type(next_cpu)) |
129 m5.drain() 130 if current_cpu != next_cpu: 131 m5.switchCpus(system, [ (current_cpu, next_cpu) ], 132 verbose=verbose) 133 else: |
134 print("Source CPU and destination CPU are the same," 135 " skipping...") |
136 current_cpu = next_cpu 137 elif exit_cause == "target called exit()" or \ 138 exit_cause == "m5_exit instruction encountered": 139 140 sys.exit(0) 141 else: |
142 print("Test failed: Unknown exit cause: %s" % exit_cause) |
143 sys.exit(1) |