registers.hh (13592:b8972ccebd63) registers.hh (13610:5d5404ac6288)
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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36 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 *
38 * Authors: Gabe Black
39 */
40
41#ifndef __ARCH_X86_REGISTERS_HH__
42#define __ARCH_X86_REGISTERS_HH__
43
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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36 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 *
38 * Authors: Gabe Black
39 */
40
41#ifndef __ARCH_X86_REGISTERS_HH__
42#define __ARCH_X86_REGISTERS_HH__
43
44#include "arch/generic/vec_pred_reg.hh"
44#include "arch/generic/vec_reg.hh"
45#include "arch/x86/generated/max_inst_regs.hh"
46#include "arch/x86/regs/int.hh"
47#include "arch/x86/regs/ccr.hh"
48#include "arch/x86/regs/misc.hh"
49#include "arch/x86/x86_traits.hh"
50
51namespace X86ISA

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72 // register index which has the IntFoldBit (1 << 6) set. To be safe
73 // we just start at (1 << 7) == 128.
74 FP_Reg_Base = 128,
75 CC_Reg_Base = FP_Reg_Base + NumFloatRegs,
76 Misc_Reg_Base = CC_Reg_Base + NumCCRegs,
77 Max_Reg_Index = Misc_Reg_Base + NumMiscRegs
78};
79
45#include "arch/generic/vec_reg.hh"
46#include "arch/x86/generated/max_inst_regs.hh"
47#include "arch/x86/regs/int.hh"
48#include "arch/x86/regs/ccr.hh"
49#include "arch/x86/regs/misc.hh"
50#include "arch/x86/x86_traits.hh"
51
52namespace X86ISA

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73 // register index which has the IntFoldBit (1 << 6) set. To be safe
74 // we just start at (1 << 7) == 128.
75 FP_Reg_Base = 128,
76 CC_Reg_Base = FP_Reg_Base + NumFloatRegs,
77 Misc_Reg_Base = CC_Reg_Base + NumCCRegs,
78 Max_Reg_Index = Misc_Reg_Base + NumMiscRegs
79};
80
81const int NumVecRegs = 1; // Not applicable to x86
82 // (1 to prevent warnings)
83const int NumVecPredRegs = 1; // Not applicable to x86
84 // (1 to prevent warnings)
85
80// semantically meaningful register indices
81//There is no such register in X86
82const int ZeroReg = NUM_INTREGS;
83const int StackPointerReg = INTREG_RSP;
84//X86 doesn't seem to have a link register
85const int ReturnAddressReg = 0;
86const int ReturnValueReg = INTREG_RAX;
87const int FramePointerReg = INTREG_RBP;
88
89// Some OS syscalls use a second register (rdx) to return a second
90// value
91const int SyscallPseudoReturnReg = INTREG_RDX;
92
93typedef RegVal IntReg;
94typedef uint64_t CCReg;
95typedef RegVal MiscReg;
96
86// semantically meaningful register indices
87//There is no such register in X86
88const int ZeroReg = NUM_INTREGS;
89const int StackPointerReg = INTREG_RSP;
90//X86 doesn't seem to have a link register
91const int ReturnAddressReg = 0;
92const int ReturnValueReg = INTREG_RAX;
93const int FramePointerReg = INTREG_RBP;
94
95// Some OS syscalls use a second register (rdx) to return a second
96// value
97const int SyscallPseudoReturnReg = INTREG_RDX;
98
99typedef RegVal IntReg;
100typedef uint64_t CCReg;
101typedef RegVal MiscReg;
102
97// dummy typedefs since we don't have vector regs
98constexpr unsigned NumVecElemPerVecReg = 2;
99using VecElem = uint32_t;
100using VecReg = ::VecRegT<VecElem, NumVecElemPerVecReg, false>;
101using ConstVecReg = ::VecRegT<VecElem, NumVecElemPerVecReg, true>;
102using VecRegContainer = VecReg::Container;
103// This has to be one to prevent warnings that are treated as errors
104constexpr unsigned NumVecRegs = 1;
103// Not applicable to x86
104using VecElem = ::DummyVecElem;
105using VecReg = ::DummyVecReg;
106using ConstVecReg = ::DummyConstVecReg;
107using VecRegContainer = ::DummyVecRegContainer;
108constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg;
109constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes;
105
110
111// Not applicable to x86
112using VecPredReg = ::DummyVecPredReg;
113using ConstVecPredReg = ::DummyConstVecPredReg;
114using VecPredRegContainer = ::DummyVecPredRegContainer;
115constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
116constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;
117
106//These floating point types are correct for mmx, but not
107//technically for x87 (80 bits) or at all for xmm (128 bits)
108typedef RegVal FloatRegBits;
109
110} // namespace X86ISA
111
112#endif // __ARCH_X86_REGFILE_HH__
118//These floating point types are correct for mmx, but not
119//technically for x87 (80 bits) or at all for xmm (128 bits)
120typedef RegVal FloatRegBits;
121
122} // namespace X86ISA
123
124#endif // __ARCH_X86_REGFILE_HH__