registers.hh (10934:5af8f40d8f2c) | registers.hh (10935:acd48ddd725f) |
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1/* 2 * Copyright (c) 2007 The Hewlett-Packard Development Company 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 43 unchanged lines hidden (view full) --- 52using X86ISAInst::MaxInstSrcRegs; 53using X86ISAInst::MaxInstDestRegs; 54using X86ISAInst::MaxMiscDestRegs; 55const int NumMiscRegs = NUM_MISCREGS; 56 57const int NumIntArchRegs = NUM_INTREGS; 58const int NumIntRegs = NumIntArchRegs + NumMicroIntRegs + NumImplicitIntRegs; 59const int NumCCRegs = NUM_CCREGS; | 1/* 2 * Copyright (c) 2007 The Hewlett-Packard Development Company 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 43 unchanged lines hidden (view full) --- 52using X86ISAInst::MaxInstSrcRegs; 53using X86ISAInst::MaxInstDestRegs; 54using X86ISAInst::MaxMiscDestRegs; 55const int NumMiscRegs = NUM_MISCREGS; 56 57const int NumIntArchRegs = NUM_INTREGS; 58const int NumIntRegs = NumIntArchRegs + NumMicroIntRegs + NumImplicitIntRegs; 59const int NumCCRegs = NUM_CCREGS; |
60const int NumVectorRegs = 0; | |
61 62#define ISA_HAS_CC_REGS 63 64// Each 128 bit xmm register is broken into two effective 64 bit registers. 65// Add 8 for the indices that are mapped over the fp stack 66const int NumFloatRegs = 67 NumMMXRegs + 2 * NumXMMRegs + NumMicroFpRegs + 8; 68 69// These enumerate all the registers for dependence tracking. 70enum DependenceTags { 71 // FP_Reg_Base must be large enough to be bigger than any integer 72 // register index which has the IntFoldBit (1 << 6) set. To be safe 73 // we just start at (1 << 7) == 128. 74 FP_Reg_Base = 128, 75 CC_Reg_Base = FP_Reg_Base + NumFloatRegs, | 60 61#define ISA_HAS_CC_REGS 62 63// Each 128 bit xmm register is broken into two effective 64 bit registers. 64// Add 8 for the indices that are mapped over the fp stack 65const int NumFloatRegs = 66 NumMMXRegs + 2 * NumXMMRegs + NumMicroFpRegs + 8; 67 68// These enumerate all the registers for dependence tracking. 69enum DependenceTags { 70 // FP_Reg_Base must be large enough to be bigger than any integer 71 // register index which has the IntFoldBit (1 << 6) set. To be safe 72 // we just start at (1 << 7) == 128. 73 FP_Reg_Base = 128, 74 CC_Reg_Base = FP_Reg_Base + NumFloatRegs, |
76 Vector_Reg_Base = CC_Reg_Base + NumCCRegs, 77 Misc_Reg_Base = Vector_Reg_Base + NumVectorRegs, | 75 Misc_Reg_Base = CC_Reg_Base + NumCCRegs, |
78 Max_Reg_Index = Misc_Reg_Base + NumMiscRegs 79}; 80 81// semantically meaningful register indices 82//There is no such register in X86 83const int ZeroReg = NUM_INTREGS; 84const int StackPointerReg = INTREG_RSP; 85//X86 doesn't seem to have a link register 86const int ReturnAddressReg = 0; 87const int ReturnValueReg = INTREG_RAX; 88const int FramePointerReg = INTREG_RBP; 89 90// Some OS syscalls use a second register (rdx) to return a second 91// value 92const int SyscallPseudoReturnReg = INTREG_RDX; 93 94typedef uint64_t IntReg; 95typedef uint64_t CCReg; | 76 Max_Reg_Index = Misc_Reg_Base + NumMiscRegs 77}; 78 79// semantically meaningful register indices 80//There is no such register in X86 81const int ZeroReg = NUM_INTREGS; 82const int StackPointerReg = INTREG_RSP; 83//X86 doesn't seem to have a link register 84const int ReturnAddressReg = 0; 85const int ReturnValueReg = INTREG_RAX; 86const int FramePointerReg = INTREG_RBP; 87 88// Some OS syscalls use a second register (rdx) to return a second 89// value 90const int SyscallPseudoReturnReg = INTREG_RDX; 91 92typedef uint64_t IntReg; 93typedef uint64_t CCReg; |
96 97// vector register file entry type 98typedef uint64_t VectorRegElement; 99const int NumVectorRegElements = 0; 100const int VectorRegBytes = NumVectorRegElements * sizeof(VectorRegElement); 101typedef std::array<VectorRegElement, NumVectorRegElements> VectorReg; 102 | |
103//XXX Should this be a 128 bit structure for XMM memory ops? 104typedef uint64_t LargestRead; 105typedef uint64_t MiscReg; 106 107//These floating point types are correct for mmx, but not 108//technically for x87 (80 bits) or at all for xmm (128 bits) 109typedef double FloatReg; 110typedef uint64_t FloatRegBits; --- 13 unchanged lines hidden --- | 94//XXX Should this be a 128 bit structure for XMM memory ops? 95typedef uint64_t LargestRead; 96typedef uint64_t MiscReg; 97 98//These floating point types are correct for mmx, but not 99//technically for x87 (80 bits) or at all for xmm (128 bits) 100typedef double FloatReg; 101typedef uint64_t FloatRegBits; --- 13 unchanged lines hidden --- |