1/* 2 * Copyright (c) 2007 The Hewlett-Packard Development Company
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3 * Copyright (c) 2013 Advanced Micro Devices, Inc. |
4 * All rights reserved. 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating 9 * to a hardware implementation of the functionality of the software 10 * licensed hereunder. You may use the software subject to the license 11 * terms below provided that you ensure that this notice is replicated 12 * unmodified and in its entirety in all distributions of the software, 13 * modified or unmodified, in source code or in binary form. 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions are 17 * met: redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer; 19 * redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution; 22 * neither the name of the copyright holders nor the names of its 23 * contributors may be used to endorse or promote products derived from 24 * this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 29 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 30 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 31 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 32 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 33 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 34 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 35 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 36 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 37 * 38 * Authors: Gabe Black 39 */ 40 41#ifndef __ARCH_X86_REGISTERS_HH__ 42#define __ARCH_X86_REGISTERS_HH__ 43 44#include "arch/x86/generated/max_inst_regs.hh" 45#include "arch/x86/regs/int.hh" 46#include "arch/x86/regs/misc.hh" 47#include "arch/x86/x86_traits.hh" 48 49namespace X86ISA 50{ 51using X86ISAInst::MaxInstSrcRegs; 52using X86ISAInst::MaxInstDestRegs; 53using X86ISAInst::MaxMiscDestRegs;
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53const int NumMiscArchRegs = NUM_MISCREGS;
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54const int NumMiscRegs = NUM_MISCREGS; 55 56const int NumIntArchRegs = NUM_INTREGS; 57const int NumIntRegs = 58 NumIntArchRegs + NumMicroIntRegs + 59 NumPseudoIntRegs + NumImplicitIntRegs; 60
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61//Each 128 bit xmm register is broken into two effective 64 bit registers.
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61// Each 128 bit xmm register is broken into two effective 64 bit registers. 62// Add 8 for the indices that are mapped over the fp stack |
63const int NumFloatRegs =
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63 NumMMXRegs + 2 * NumXMMRegs + NumMicroFpRegs;
64const int NumFloatArchRegs = NumFloatRegs + 8;
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64 NumMMXRegs + 2 * NumXMMRegs + NumMicroFpRegs + 8; |
65 66// These enumerate all the registers for dependence tracking. 67enum DependenceTags {
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68 //There are 16 microcode registers at the moment. This is an
69 //unusually large constant to make sure there isn't overflow.
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68 // FP_Base_DepTag must be large enough to be bigger than any integer 69 // register index which has the IntFoldBit (1 << 6) set. To be safe 70 // we just start at (1 << 7) == 128. |
71 FP_Base_DepTag = 128,
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71 Ctrl_Base_DepTag =
72 FP_Base_DepTag +
73 //mmx/x87 registers
74 8 +
75 //xmm registers
76 16 * 2 +
77 //The microcode fp registers
78 8 +
79 //The indices that are mapped over the fp stack
80 8,
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72 Ctrl_Base_DepTag = FP_Base_DepTag + NumFloatRegs, |
73 Max_DepTag = Ctrl_Base_DepTag + NumMiscRegs 74}; 75 76// semantically meaningful register indices 77//There is no such register in X86 78const int ZeroReg = NUM_INTREGS; 79const int StackPointerReg = INTREG_RSP; 80//X86 doesn't seem to have a link register 81const int ReturnAddressReg = 0; 82const int ReturnValueReg = INTREG_RAX; 83const int FramePointerReg = INTREG_RBP; 84 85// Some OS syscalls use a second register (rdx) to return a second 86// value 87const int SyscallPseudoReturnReg = INTREG_RDX; 88 89typedef uint64_t IntReg; 90//XXX Should this be a 128 bit structure for XMM memory ops? 91typedef uint64_t LargestRead; 92typedef uint64_t MiscReg; 93 94//These floating point types are correct for mmx, but not 95//technically for x87 (80 bits) or at all for xmm (128 bits) 96typedef double FloatReg; 97typedef uint64_t FloatRegBits; 98typedef union 99{ 100 IntReg intReg; 101 FloatReg fpReg; 102 MiscReg ctrlReg; 103} AnyReg; 104 105typedef uint16_t RegIndex; 106 107} // namespace X86ISA 108 109#endif // __ARCH_X86_REGFILE_HH__
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