mmapped_ipr.hh (9897:e105fbf799e7) mmapped_ipr.hh (12406:86bde4a026b5)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 37 unchanged lines hidden (view full) ---

46{
47
48inline Cycles
49handleIprRead(ThreadContext *xc, Packet *pkt)
50{
51 if (GenericISA::isGenericIprAccess(pkt))
52 return GenericISA::handleGenericIprRead(xc, pkt);
53 else
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 37 unchanged lines hidden (view full) ---

46{
47
48inline Cycles
49handleIprRead(ThreadContext *xc, Packet *pkt)
50{
51 if (GenericISA::isGenericIprAccess(pkt))
52 return GenericISA::handleGenericIprRead(xc, pkt);
53 else
54 return xc->getDTBPtr()->doMmuRegRead(xc, pkt);
54 return dynamic_cast<TLB *>(xc->getDTBPtr())->doMmuRegRead(xc, pkt);
55}
56
57inline Cycles
58handleIprWrite(ThreadContext *xc, Packet *pkt)
59{
60 if (GenericISA::isGenericIprAccess(pkt))
61 return GenericISA::handleGenericIprWrite(xc, pkt);
62 else
55}
56
57inline Cycles
58handleIprWrite(ThreadContext *xc, Packet *pkt)
59{
60 if (GenericISA::isGenericIprAccess(pkt))
61 return GenericISA::handleGenericIprWrite(xc, pkt);
62 else
63 return xc->getDTBPtr()->doMmuRegWrite(xc, pkt);
63 return dynamic_cast<TLB *>(xc->getDTBPtr())->doMmuRegWrite(xc, pkt);
64}
65
66
67} // namespace SparcISA
68
69#endif
64}
65
66
67} // namespace SparcISA
68
69#endif