mmapped_ipr.hh (9180:ee8d7a51651d) mmapped_ipr.hh (9897:e105fbf799e7)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 23 unchanged lines hidden (view full) ---

32#define __ARCH_SPARC_MMAPPED_IPR_HH__
33
34/**
35 * @file
36 *
37 * ISA-specific helper functions for memory mapped IPR accesses.
38 */
39
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 23 unchanged lines hidden (view full) ---

32#define __ARCH_SPARC_MMAPPED_IPR_HH__
33
34/**
35 * @file
36 *
37 * ISA-specific helper functions for memory mapped IPR accesses.
38 */
39
40#include "arch/generic/mmapped_ipr.hh"
40#include "arch/sparc/tlb.hh"
41#include "cpu/thread_context.hh"
42#include "mem/packet.hh"
43
44namespace SparcISA
45{
46
47inline Cycles
48handleIprRead(ThreadContext *xc, Packet *pkt)
49{
41#include "arch/sparc/tlb.hh"
42#include "cpu/thread_context.hh"
43#include "mem/packet.hh"
44
45namespace SparcISA
46{
47
48inline Cycles
49handleIprRead(ThreadContext *xc, Packet *pkt)
50{
50 return xc->getDTBPtr()->doMmuRegRead(xc, pkt);
51 if (GenericISA::isGenericIprAccess(pkt))
52 return GenericISA::handleGenericIprRead(xc, pkt);
53 else
54 return xc->getDTBPtr()->doMmuRegRead(xc, pkt);
51}
52
53inline Cycles
54handleIprWrite(ThreadContext *xc, Packet *pkt)
55{
55}
56
57inline Cycles
58handleIprWrite(ThreadContext *xc, Packet *pkt)
59{
56 return xc->getDTBPtr()->doMmuRegWrite(xc, pkt);
60 if (GenericISA::isGenericIprAccess(pkt))
61 return GenericISA::handleGenericIprWrite(xc, pkt);
62 else
63 return xc->getDTBPtr()->doMmuRegWrite(xc, pkt);
57}
58
59
60} // namespace SparcISA
61
62#endif
64}
65
66
67} // namespace SparcISA
68
69#endif