mmapped_ipr.hh (8105:906864dd0937) mmapped_ipr.hh (8229:78bf55f23338)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 23 unchanged lines hidden (view full) ---

32#define __ARCH_SPARC_MMAPPED_IPR_HH__
33
34/**
35 * @file
36 *
37 * ISA-specific helper functions for memory mapped IPR accesses.
38 */
39
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 23 unchanged lines hidden (view full) ---

32#define __ARCH_SPARC_MMAPPED_IPR_HH__
33
34/**
35 * @file
36 *
37 * ISA-specific helper functions for memory mapped IPR accesses.
38 */
39
40#include "arch/sparc/tlb.hh"
40#include "config/full_system.hh"
41#include "cpu/thread_context.hh"
42#include "mem/packet.hh"
41#include "config/full_system.hh"
42#include "cpu/thread_context.hh"
43#include "mem/packet.hh"
43#include "arch/sparc/tlb.hh"
44
44
45
46namespace SparcISA
47{
48
49inline Tick
50handleIprRead(ThreadContext *xc, Packet *pkt)
51{
52#if FULL_SYSTEM
53 return xc->getDTBPtr()->doMmuRegRead(xc, pkt);

--- 19 unchanged lines hidden --- 		45namespace SparcISA
46{
47
48inline Tick
49handleIprRead(ThreadContext *xc, Packet *pkt)
50{
51#if FULL_SYSTEM
52 return xc->getDTBPtr()->doMmuRegRead(xc, pkt);

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