mem.cc (7428:eea9a618c882) mem.cc (7429:af0e80844b14)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 46 unchanged lines hidden (view full) ---

55 os << "-";
56 printReg(os, index);
57 if (shiftType != LSL || shiftAmt != 0) {
58 switch (shiftType) {
59 case LSL:
60 ccprintf(os, " LSL #%d", shiftAmt);
61 break;
62 case LSR:
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 46 unchanged lines hidden (view full) ---

55 os << "-";
56 printReg(os, index);
57 if (shiftType != LSL || shiftAmt != 0) {
58 switch (shiftType) {
59 case LSL:
60 ccprintf(os, " LSL #%d", shiftAmt);
61 break;
62 case LSR:
63 if (shiftAmt == 0) {
64 ccprintf(os, " LSR #%d", 32);
65 } else {
66 ccprintf(os, " LSR #%d", shiftAmt);
67 }
63 ccprintf(os, " LSR #%d", (shiftAmt == 0) ? 32 : shiftAmt);
68 break;
69 case ASR:
64 break;
65 case ASR:
70 if (shiftAmt == 0) {
71 ccprintf(os, " ASR #%d", 32);
72 } else {
73 ccprintf(os, " ASR #%d", shiftAmt);
74 }
66 ccprintf(os, " ASR #%d", (shiftAmt == 0) ? 32 : shiftAmt);
75 break;
76 case ROR:
77 if (shiftAmt == 0) {
78 ccprintf(os, " RRX");
79 } else {
80 ccprintf(os, " ROR #%d", shiftAmt);
81 }
82 break;

--- 120 unchanged lines hidden --- 		67 break;
68 case ROR:
69 if (shiftAmt == 0) {
70 ccprintf(os, " RRX");
71 } else {
72 ccprintf(os, " ROR #%d", shiftAmt);
73 }
74 break;

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