mem.cc (7291:2d21be52e57f) mem.cc (7312:03016344f54e)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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82 }
83 printReg(ss, base);
84 if (wb) {
85 ss << "!";
86 }
87 return ss.str();
88}
89
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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82 }
83 printReg(ss, base);
84 if (wb) {
85 ss << "!";
86 }
87 return ss.str();
88}
89
90string
91SrsOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
92{
93 stringstream ss;
94 switch (mode) {
95 case DecrementAfter:
96 printMnemonic(ss, "da");
97 break;
98 case DecrementBefore:
99 printMnemonic(ss, "db");
100 break;
101 case IncrementAfter:
102 printMnemonic(ss, "ia");
103 break;
104 case IncrementBefore:
105 printMnemonic(ss, "ib");
106 break;
107 }
108 printReg(ss, INTREG_SP);
109 if (wb) {
110 ss << "!";
111 }
112 ss << ", #";
113 switch (mode) {
114 case MODE_USER:
115 ss << "user";
116 break;
117 case MODE_FIQ:
118 ss << "fiq";
119 break;
120 case MODE_IRQ:
121 ss << "irq";
122 break;
123 case MODE_SVC:
124 ss << "supervisor";
125 break;
126 case MODE_MON:
127 ss << "monitor";
128 break;
129 case MODE_ABORT:
130 ss << "abort";
131 break;
132 case MODE_UNDEFINED:
133 ss << "undefined";
134 break;
135 case MODE_SYSTEM:
136 ss << "system";
137 break;
138 default:
139 ss << "unrecognized";
140 break;
141 }
142 return ss.str();
143}
144
90void
91Memory::printInst(std::ostream &os, AddrMode addrMode) const
92{
93 printMnemonic(os);
94 printDest(os);
95 os << ", [";
96 printReg(os, base);
97 if (addrMode != AddrMd_PostIndex) {

--- 14 unchanged lines hidden --- 		145void
146Memory::printInst(std::ostream &os, AddrMode addrMode) const
147{
148 printMnemonic(os);
149 printDest(os);
150 os << ", [";
151 printReg(os, base);
152 if (addrMode != AddrMd_PostIndex) {

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