1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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43#include "arch/arm/insts/mem.hh"
44#include "base/loader/symtab.hh"
45
46using namespace std;
47
48namespace ArmISA
49{
50
51string
52Swap::generateDisassembly(Addr pc, const SymbolTable *symtab) const
53{
54 stringstream ss;
55 printMnemonic(ss);
56 printReg(ss, dest);
57 ss << ", ";
58 printReg(ss, op1);

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