1/* Copyright (c) 2007-2008 The Florida State University
2 * All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met: redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer;
8 * redistributions in binary form must reproduce the above copyright
9 * notice, this list of conditions and the following disclaimer in the

--- 17 unchanged lines hidden (view full) ---

27 * Authors: Stephen Hines
28 */
29
30#include "arch/arm/insts/mem.hh"
31#include "base/loader/symtab.hh"
32
33namespace ArmISA
34{
35std::string
36Memory::generateDisassembly(Addr pc, const SymbolTable *symtab) const
37{
38 std::stringstream ss;
39 printMnemonic(ss);
40 printReg(ss, machInst.rd);
41 ss << ", [";
42 printReg(ss, machInst.rn);
43 ss << ", ";
44 if (machInst.puswl.prepost == 1)
45 printOffset(ss);
46 ss << "]";
47 if (machInst.puswl.prepost == 0)
48 printOffset(ss);
49 else if (machInst.puswl.writeback)
50 ss << "!";
51 return ss.str();
52}
53}