CpuConfig.py (12095:07ec0befb9f1) | CpuConfig.py (12097:77a3d2890ba6) |
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1# Copyright (c) 2012 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 99 unchanged lines hidden (view full) --- 108 cpu.SQEntries = 128; 109 else: 110 fatal("%s does not support data dependency tracing. Use a CPU model of" 111 " type or inherited from DerivO3CPU.", cpu_cls) 112 113# The ARM detailed CPU is special in the sense that it doesn't exist 114# in the normal object hierarchy, so we have to add it manually. 115try: | 1# Copyright (c) 2012 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 99 unchanged lines hidden (view full) --- 108 cpu.SQEntries = 128; 109 else: 110 fatal("%s does not support data dependency tracing. Use a CPU model of" 111 " type or inherited from DerivO3CPU.", cpu_cls) 112 113# The ARM detailed CPU is special in the sense that it doesn't exist 114# in the normal object hierarchy, so we have to add it manually. 115try: |
116 from O3_ARM_v7a import O3_ARM_v7a_3 | 116 from cores.arm.O3_ARM_v7a import O3_ARM_v7a_3 |
117 _cpu_classes["O3_ARM_v7a_3"] = O3_ARM_v7a_3 118except: 119 pass 120 121# The calibrated ex5-model cores 122try: | 117 _cpu_classes["O3_ARM_v7a_3"] = O3_ARM_v7a_3 118except: 119 pass 120 121# The calibrated ex5-model cores 122try: |
123 from ex5_LITTLE import ex5_LITTLE | 123 from cores.arm.ex5_LITTLE import ex5_LITTLE |
124 _cpu_classes["ex5_LITTLE"] = ex5_LITTLE 125except: | 124 _cpu_classes["ex5_LITTLE"] = ex5_LITTLE 125except: |
126 pass | 126 pass |
127 128try: | 127 128try: |
129 from ex5_big import ex5_big | 129 from cores.arm.ex5_big import ex5_big |
130 _cpu_classes["ex5_big"] = ex5_big 131except: | 130 _cpu_classes["ex5_big"] = ex5_big 131except: |
132 pass | 132 pass |
133 134 135# Add all CPUs in the object hierarchy. 136for name, cls in inspect.getmembers(m5.objects, is_cpu_class): 137 _cpu_classes[name] = cls | 133 134 135# Add all CPUs in the object hierarchy. 136for name, cls in inspect.getmembers(m5.objects, is_cpu_class): 137 _cpu_classes[name] = cls |