1# Copyright (c) 2012 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Redistribution and use in source and binary forms, with or without
14# modification, are permitted provided that the following conditions are
15# met: redistributions of source code must retain the above copyright
16# notice, this list of conditions and the following disclaimer;
17# redistributions in binary form must reproduce the above copyright
18# notice, this list of conditions and the following disclaimer in the
19# documentation and/or other materials provided with the distribution;
20# neither the name of the copyright holders nor the names of its
21# contributors may be used to endorse or promote products derived from
22# this software without specific prior written permission.
23#
24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36# Authors: Andreas Sandberg
37
38from m5 import fatal
39import m5.objects
40import inspect
41import sys
42from textwrap import TextWrapper
43
44# Dictionary of mapping names of real CPU models to classes.
45_cpu_classes = {}
46
47
48def is_cpu_class(cls):
49 """Determine if a class is a CPU that can be instantiated"""
50
51 # We can't use the normal inspect.isclass because the ParamFactory
52 # and ProxyFactory classes have a tendency to confuse it.
53 try:
54 return issubclass(cls, m5.objects.BaseCPU) and \
55 not cls.abstract and \
56 not issubclass(cls, m5.objects.CheckerCPU)
57 except (TypeError, AttributeError):
58 return False
59
60def get(name):
61 """Get a CPU class from a user provided class name or alias."""
62
63 try:
64 cpu_class = _cpu_classes[name]
65 return cpu_class
66 except KeyError:
67 print "%s is not a valid CPU model." % (name,)
68 sys.exit(1)
69
70def print_cpu_list():
71 """Print a list of available CPU classes including their aliases."""
72
73 print "Available CPU classes:"
74 doc_wrapper = TextWrapper(initial_indent="\t\t", subsequent_indent="\t\t")
75 for name, cls in _cpu_classes.items():
76 print "\t%s" % name
77
78 # Try to extract the class documentation from the class help
79 # string.
80 doc = inspect.getdoc(cls)
81 if doc:
82 for line in doc_wrapper.wrap(doc):
83 print line
84
85def cpu_names():
86 """Return a list of valid CPU names."""
87 return _cpu_classes.keys()
88
89def config_etrace(cpu_cls, cpu_list, options):
90 if issubclass(cpu_cls, m5.objects.DerivO3CPU):
91 # Assign the same file name to all cpus for now. This must be
92 # revisited when creating elastic traces for multi processor systems.
93 for cpu in cpu_list:
94 # Attach the elastic trace probe listener. Set the protobuf trace
95 # file names. Set the dependency window size equal to the cpu it
96 # is attached to.
97 cpu.traceListener = m5.objects.ElasticTrace(
98 instFetchTraceFile = options.inst_trace_file,
99 dataDepTraceFile = options.data_trace_file,
100 depWindowSize = 3 * cpu.numROBEntries)
101 # Make the number of entries in the ROB, LQ and SQ very
102 # large so that there are no stalls due to resource
103 # limitation as such stalls will get captured in the trace
104 # as compute delay. For replay, ROB, LQ and SQ sizes are
105 # modelled in the Trace CPU.
106 cpu.numROBEntries = 512;
107 cpu.LQEntries = 128;
108 cpu.SQEntries = 128;
109 else:
110 fatal("%s does not support data dependency tracing. Use a CPU model of"
111 " type or inherited from DerivO3CPU.", cpu_cls)
112
113# The ARM detailed CPU is special in the sense that it doesn't exist
114# in the normal object hierarchy, so we have to add it manually.
115try:
| 1# Copyright (c) 2012 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Redistribution and use in source and binary forms, with or without
14# modification, are permitted provided that the following conditions are
15# met: redistributions of source code must retain the above copyright
16# notice, this list of conditions and the following disclaimer;
17# redistributions in binary form must reproduce the above copyright
18# notice, this list of conditions and the following disclaimer in the
19# documentation and/or other materials provided with the distribution;
20# neither the name of the copyright holders nor the names of its
21# contributors may be used to endorse or promote products derived from
22# this software without specific prior written permission.
23#
24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36# Authors: Andreas Sandberg
37
38from m5 import fatal
39import m5.objects
40import inspect
41import sys
42from textwrap import TextWrapper
43
44# Dictionary of mapping names of real CPU models to classes.
45_cpu_classes = {}
46
47
48def is_cpu_class(cls):
49 """Determine if a class is a CPU that can be instantiated"""
50
51 # We can't use the normal inspect.isclass because the ParamFactory
52 # and ProxyFactory classes have a tendency to confuse it.
53 try:
54 return issubclass(cls, m5.objects.BaseCPU) and \
55 not cls.abstract and \
56 not issubclass(cls, m5.objects.CheckerCPU)
57 except (TypeError, AttributeError):
58 return False
59
60def get(name):
61 """Get a CPU class from a user provided class name or alias."""
62
63 try:
64 cpu_class = _cpu_classes[name]
65 return cpu_class
66 except KeyError:
67 print "%s is not a valid CPU model." % (name,)
68 sys.exit(1)
69
70def print_cpu_list():
71 """Print a list of available CPU classes including their aliases."""
72
73 print "Available CPU classes:"
74 doc_wrapper = TextWrapper(initial_indent="\t\t", subsequent_indent="\t\t")
75 for name, cls in _cpu_classes.items():
76 print "\t%s" % name
77
78 # Try to extract the class documentation from the class help
79 # string.
80 doc = inspect.getdoc(cls)
81 if doc:
82 for line in doc_wrapper.wrap(doc):
83 print line
84
85def cpu_names():
86 """Return a list of valid CPU names."""
87 return _cpu_classes.keys()
88
89def config_etrace(cpu_cls, cpu_list, options):
90 if issubclass(cpu_cls, m5.objects.DerivO3CPU):
91 # Assign the same file name to all cpus for now. This must be
92 # revisited when creating elastic traces for multi processor systems.
93 for cpu in cpu_list:
94 # Attach the elastic trace probe listener. Set the protobuf trace
95 # file names. Set the dependency window size equal to the cpu it
96 # is attached to.
97 cpu.traceListener = m5.objects.ElasticTrace(
98 instFetchTraceFile = options.inst_trace_file,
99 dataDepTraceFile = options.data_trace_file,
100 depWindowSize = 3 * cpu.numROBEntries)
101 # Make the number of entries in the ROB, LQ and SQ very
102 # large so that there are no stalls due to resource
103 # limitation as such stalls will get captured in the trace
104 # as compute delay. For replay, ROB, LQ and SQ sizes are
105 # modelled in the Trace CPU.
106 cpu.numROBEntries = 512;
107 cpu.LQEntries = 128;
108 cpu.SQEntries = 128;
109 else:
110 fatal("%s does not support data dependency tracing. Use a CPU model of"
111 " type or inherited from DerivO3CPU.", cpu_cls)
112
113# The ARM detailed CPU is special in the sense that it doesn't exist
114# in the normal object hierarchy, so we have to add it manually.
115try:
|