Searched refs:MISCREG_TSC_AUX (Results 1 - 4 of 4) sorted by relevance

/gem5/src/arch/x86/regs/
H A Dmsr.cc122 MsrVal(0xC0000103, MISCREG_TSC_AUX),
H A Dmisc.hh257 MISCREG_TSC_AUX, enumerator in enum:X86ISA::MiscRegIndex
/gem5/src/arch/x86/
H A Dutility.cc139 tc->setMiscReg(MISCREG_TSC_AUX, 0);
/gem5/src/gpu-compute/
H A Dgpu_tlb.cc541 regNum = MISCREG_TSC_AUX;

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