Searched refs:MISCREG_TLBI_VMALLE1IS (Results 1 - 5 of 5) sorted by relevance

/gem5/src/arch/arm/insts/
H A Dmisc64.cc190 case MISCREG_TLBI_VMALLE1IS:
/gem5/src/arch/arm/
H A Dmiscregs.hh552 MISCREG_TLBI_VMALLE1IS, enumerator in enum:ArmISA::MiscRegIndex
H A Disa.cc1431 case MISCREG_TLBI_VMALLE1IS:
H A Dmiscregs.cc1332 return MISCREG_TLBI_VMALLE1IS;
4215 InitReg(MISCREG_TLBI_VMALLE1IS)
/gem5/src/arch/arm/tracers/
H A Dtarmac_parser.cc513 { "tlbi_vmalle1is", MISCREG_TLBI_VMALLE1IS },

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