Searched refs:MISCREG_TLBIALL (Results 1 - 5 of 5) sorted by relevance

/gem5/src/arch/arm/
H A Dutility.cc550 case MISCREG_TLBIALL:
H A Dmiscregs.hh268 MISCREG_TLBIALL, enumerator in enum:ArmISA::MiscRegIndex
H A Disa.cc1109 case MISCREG_TLBIALL: // TLBI all entries, EL0&1,
H A Dmiscregs.cc481 return MISCREG_TLBIALL;
3454 InitReg(MISCREG_TLBIALL)
/gem5/src/arch/arm/tracers/
H A Dtarmac_parser.cc242 { "tlbiall", MISCREG_TLBIALL },

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