Searched refs:MISCREG_TCR_EL1 (Results 1 - 8 of 8) sorted by relevance

/gem5/src/arch/arm/insts/
H A Dmisc64.cc171 case MISCREG_TCR_EL1:
/gem5/src/arch/arm/
H A Dutility.cc423 tcr = tc->readMiscReg(MISCREG_TCR_EL1);
H A Dmiscregs.hh484 MISCREG_TCR_EL1, enumerator in enum:ArmISA::MiscRegIndex
H A Dtlb.cc1322 ttbcr = tc->readMiscReg(MISCREG_TCR_EL1);
H A Disa.cc1848 case MISCREG_TCR_EL1:
H A Dmiscregs.cc1926 return MISCREG_TCR_EL1;
4045 InitReg(MISCREG_TCR_EL1)
H A Dtable_walker.cc275 currState->tcr = currState->tc->readMiscReg(MISCREG_TCR_EL1);
/gem5/src/arch/arm/tracers/
H A Dtarmac_parser.cc445 { "tcr_el1", MISCREG_TCR_EL1 },

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