Searched refs:MISCREG_SCTLR_RST (Results 1 - 3 of 3) sorted by relevance

/gem5/src/arch/arm/
H A Disa.cc71 miscRegs[MISCREG_SCTLR_RST] = 0;
132 SCTLR sctlr_rst = miscRegs[MISCREG_SCTLR_RST];
239 miscRegs[MISCREG_SCTLR_RST] = sctlr_rst;
H A Dmiscregs.hh88 MISCREG_SCTLR_RST, enumerator in enum:ArmISA::MiscRegIndex
H A Dmiscregs.cc2959 InitReg(MISCREG_SCTLR_RST)

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