Searched refs:MISCREG_MC5_STATUS (Results 1 - 3 of 3) sorted by relevance
/gem5/src/arch/x86/regs/ | ||
H A D | msr.cc | 95 MsrVal(0x415, MISCREG_MC5_STATUS), |
H A D | misc.hh | 219 MISCREG_MC5_STATUS, enumerator in enum:X86ISA::MiscRegIndex |
/gem5/src/gpu-compute/ | ||
H A D | gpu_tlb.cc | 460 regNum = MISCREG_MC5_STATUS; |
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