Searched hist:11627 (Results 1 - 5 of 5) sorted by relevance

/gem5/src/cpu/
H A Dthread_context.cc11627:fe32a5238754 Tue Sep 13 23:17:00 EDT 2016 Michael LeBeane <michael.lebeane@amd.com> sim: Refactor quiesce and remove FS asserts
The quiesce family of magic ops can be simplified by the inclusion of
quiesceTick() and quiesce() functions on ThreadContext. This patch also
gets rid of the FS guards, since suspending a CPU is also a valid
operation for SE mode.
H A Dsimple_thread.cc11627:fe32a5238754 Tue Sep 13 23:17:00 EDT 2016 Michael LeBeane <michael.lebeane@amd.com> sim: Refactor quiesce and remove FS asserts
The quiesce family of magic ops can be simplified by the inclusion of
quiesceTick() and quiesce() functions on ThreadContext. This patch also
gets rid of the FS guards, since suspending a CPU is also a valid
operation for SE mode.
H A Dthread_context.hh11627:fe32a5238754 Tue Sep 13 23:17:00 EDT 2016 Michael LeBeane <michael.lebeane@amd.com> sim: Refactor quiesce and remove FS asserts
The quiesce family of magic ops can be simplified by the inclusion of
quiesceTick() and quiesce() functions on ThreadContext. This patch also
gets rid of the FS guards, since suspending a CPU is also a valid
operation for SE mode.
/gem5/src/sim/
H A Dpseudo_inst.cc11627:fe32a5238754 Tue Sep 13 23:17:00 EDT 2016 Michael LeBeane <michael.lebeane@amd.com> sim: Refactor quiesce and remove FS asserts
The quiesce family of magic ops can be simplified by the inclusion of
quiesceTick() and quiesce() functions on ThreadContext. This patch also
gets rid of the FS guards, since suspending a CPU is also a valid
operation for SE mode.
/gem5/src/cpu/o3/
H A Dcpu.cc11627:fe32a5238754 Tue Sep 13 23:17:00 EDT 2016 Michael LeBeane <michael.lebeane@amd.com> sim: Refactor quiesce and remove FS asserts
The quiesce family of magic ops can be simplified by the inclusion of
quiesceTick() and quiesce() functions on ThreadContext. This patch also
gets rid of the FS guards, since suspending a CPU is also a valid
operation for SE mode.

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