Searched hist:11577 (Results 1 - 3 of 3) sorted by relevance
/gem5/src/arch/arm/ | ||
H A D | tlb.hh | 11577:a26a328c20eb Tue Aug 02 05:38:00 EDT 2016 Dylan Johnson <Dylan.Johnson@ARM.com> arm: Fix EL perceived at TLB for address translation instructions During address translation instructions (such as AT S1E1R_Xt) the exception level can be different than the current exception level. This patch fixes how the TLB determines what EL to use during these instructions. Change-Id: Ia9ce229404de9e284bc1f7479fd2c580efd55f8f |
H A D | tlb.cc | 11577:a26a328c20eb Tue Aug 02 05:38:00 EDT 2016 Dylan Johnson <Dylan.Johnson@ARM.com> arm: Fix EL perceived at TLB for address translation instructions During address translation instructions (such as AT S1E1R_Xt) the exception level can be different than the current exception level. This patch fixes how the TLB determines what EL to use during these instructions. Change-Id: Ia9ce229404de9e284bc1f7479fd2c580efd55f8f |
H A D | isa.cc | 11577:a26a328c20eb Tue Aug 02 05:38:00 EDT 2016 Dylan Johnson <Dylan.Johnson@ARM.com> arm: Fix EL perceived at TLB for address translation instructions During address translation instructions (such as AT S1E1R_Xt) the exception level can be different than the current exception level. This patch fixes how the TLB determines what EL to use during these instructions. Change-Id: Ia9ce229404de9e284bc1f7479fd2c580efd55f8f |
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