Searched hist:10361 (Results 1 - 4 of 4) sorted by relevance

/gem5/src/sim/
H A Dglobal_event.cc10361:280cc9b0794f Tue Sep 09 04:36:00 EDT 2014 Andreas Sandberg <Andreas.Sandberg@ARM.com> sim: Fix resource leak in BaseGlobalEvent

Static analysis revealed that BaseGlobalEvent::barrier was never
deallocated. This changeset solves this leak by making the barrier
allocation a part of the BaseGlobalEvent instead of storing a pointer
to a separate heap-allocated barrier.
H A Dglobal_event.hh10361:280cc9b0794f Tue Sep 09 04:36:00 EDT 2014 Andreas Sandberg <Andreas.Sandberg@ARM.com> sim: Fix resource leak in BaseGlobalEvent

Static analysis revealed that BaseGlobalEvent::barrier was never
deallocated. This changeset solves this leak by making the barrier
allocation a part of the BaseGlobalEvent instead of storing a pointer
to a separate heap-allocated barrier.
/gem5/src/arch/arm/
H A Dmiscregs.cc12690:810dd3bdac8f Wed Apr 25 13:23:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> arch-arm: Map ID_x_EL1 registers to AArch32 version

AArch64 ID_x_EL1 registers map to AArch32 ID_x counterparts. Those
registers must be initialized even when the highest Exception Level is
using AArch64.

Change-Id: Iccc9b6f631f5fac288116eb1ef2ad1d30c03de7b
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/10361
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
H A Disa.cc12690:810dd3bdac8f Wed Apr 25 13:23:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> arch-arm: Map ID_x_EL1 registers to AArch32 version

AArch64 ID_x_EL1 registers map to AArch32 ID_x counterparts. Those
registers must be initialized even when the highest Exception Level is
using AArch64.

Change-Id: Iccc9b6f631f5fac288116eb1ef2ad1d30c03de7b
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/10361
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

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