Searched refs:store_idx (Results 1 - 4 of 4) sorted by relevance

/gem5/src/cpu/o3/
H A Dlsq_unit.hh365 void completeStore(typename StoreQueue::iterator store_idx);
577 Fault write(LSQRequest *req, uint8_t *data, int store_idx);
855 LSQUnit<Impl>::write(LSQRequest *req, uint8_t *data, int store_idx) argument
857 assert(storeQueue[store_idx].valid());
861 store_idx - 1, req->request()->getPaddr(), storeQueue.head() - 1,
862 storeQueue[store_idx].instruction()->seqNum);
864 storeQueue[store_idx].setRequest(req);
866 storeQueue[store_idx].size() = size;
869 storeQueue[store_idx].isAllZeros() = store_no_data;
876 memcpy(storeQueue[store_idx]
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H A Dlsq_unit_impl.hh606 int store_idx = store_inst->sqIdx; local
630 if (storeQueue[store_idx].size() == 0) {
642 storeQueue[store_idx].canWB() = true;
992 LSQUnit<Impl>::completeStore(typename StoreQueue::iterator store_idx) argument
994 assert(store_idx->valid());
995 store_idx->completed() = true;
1005 DynInstPtr store_inst = store_idx->instruction();
1006 if (store_idx == storeQueue.begin()) {
1019 store_inst->seqNum, store_idx.idx() - 1, storeQueue.head() - 1);
H A Dlsq.hh1016 Fault write(LSQRequest* req, uint8_t *data, int store_idx);
1130 LSQ<Impl>::write(LSQRequest* req, uint8_t *data, int store_idx) argument
1134 return thread.at(tid).write(req, data, store_idx);
H A Dcpu.hh732 Fault write(LSQRequest* req, uint8_t *data, int store_idx) argument
734 return this->iew.ldstQueue.write(req, data, store_idx);

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