Searched refs:r9 (Results 1 - 18 of 18) sorted by relevance

/gem5/ext/systemc/src/sysc/qt/md/
H A Dvax.s56 movl (sp)+,r9 /* Get `startup'. */
61 calls $1,(r9) /* Call `startup', pop `qt' on return. */
H A Dm88k_b.s64 add r8, r9,r0
69 add r8, r9,r0
75 add r8, r9,r0
80 add r8, r9,r0
H A Dm88k.s17 * Argument registers r2..r9, return value r2..r3.
48 ** for r2-r9 for varargs. For context switches we don't use
126 addu r9, r18,0 /* Set arg7. */
H A Dhppa.s56 stw %r9,-104(%sp)
85 ldw -104(%sp),%r9
H A Dpowerpc_mach.s612 lwz r9,PAR_10(r1)
H A Dpowerpc_sys5.s610 lwz %r9,PAR_10(%r1)
/gem5/src/arch/x86/
H A Dnativetrace.cc56 r9 = X86ISA::gtoh(r9);
83 r9 = tc->readIntReg(X86ISA::INTREG_R9);
165 checkReg("r9", mState.r9, nState.r9);
H A Dnativetrace.hh59 uint64_t r9; member in struct:Trace::X86NativeTrace::ThreadState
H A Dremote_gdb.hh109 uint64_t r9; member in struct:X86ISA::RemoteGDB::AMD64GdbRegCache::M5_ATTR_PACKED
H A Dremote_gdb.cc120 r.r9 = context->readIntReg(INTREG_R9);
172 context->setIntReg(INTREG_R9, r.r9);
/gem5/system/alpha/palcode/
H A Dosfpal.S108 // r9 ITBmiss/DTBmiss scratch
262 srl r25, isr_v_hlt, r9 // Get HLT bit
266 blbs r9, sys_halt_interrupt // halt_interrupt if HLT bit set
295 subq r13, 0x1d, r9 // Check for 1d, 1e, 1f
297 cmovge r9, r8, r12 // if .ge. 1d, then take shifted value
323 // This routine can use the PALshadow registers r8, r9, and r10
366 // This routine can use the PALshadow registers r8, r9, and r10
377 mfpr r9, ev5__mm_stat // Get read/write bit. E0.
410 // r9 - original MMstat
574 srl r13, mm_stat_v_opcode, r9 // Shif
[all...]
H A Dplatform.S916 lda r9, mchk_c_sys_ecc(r31) // System Correctable error MCHK code
1036 lda r9, 1(r31)
1037 sll r9, hwint_clr_v_crdc, r9 // get ack bit for crd
1038 mtpr r9, ev5__hwint_clr // ack the crd interrupt
1041 lda r9, mchk_c_ecc_c(r31) // Correctable error MCHK code
1107 stq_p r9, mchk_crd_mchk_code(r14)
1114 sll r1, 63, r9 // Move retry flag to bit 63
1115 lda r1, mchk_crd_size(r9) // Combine retry flag and frame size
1483 or r31, 1, r9 // ge
[all...]
/gem5/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/int_datatype/
H A Dint_datatype.cpp74 unsigned int r1, r2, r3, r4, r5, r6, r7, r8, r9; local
95 r9 = op1 < op2; // Less than
174 << "\n" << op1 << "\t < \t\t " << op2 << "\t = " << r9
/gem5/system/alpha/h/
H A Ddc21164FromGasSources.h698 #define r9 $9 macro
802 #define p1 r9 /* ITB/DTB Miss Scratch */
/gem5/util/statetrace/arch/amd64/
H A Dtracechild.cc100 case R9: return myregs.r9;
/gem5/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_datatype/
H A Dstd_ulogic_datatype.cpp198 std_ulogic r1, r2, r3, r4, r5, r6, r7, r8, r9; local
219 // r9 = op1 < op2; // Less than
298 // << "\n" << op1 << "\t < \t\t " << op2 << "\t = " << r9
/gem5/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/
H A Dstd_ulogic_vector_datatype.cpp495 std_ulogic_vector<4> r9, r10, r11, r12, r13, r14; local
519 // r9 = op1 < op2; // Less than
613 // << "\n" << op1 << "\t < \t\t " << op2 << "\t = " << r9
/gem5/src/cpu/kvm/
H A Dx86_cpu.cc115 APPLY_IREG(r9, INTREG_R9); \

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