Lines Matching refs:r9
916 lda r9, mchk_c_sys_ecc(r31) // System Correctable error MCHK code
1036 lda r9, 1(r31)
1037 sll r9, hwint_clr_v_crdc, r9 // get ack bit for crd
1038 mtpr r9, ev5__hwint_clr // ack the crd interrupt
1041 lda r9, mchk_c_ecc_c(r31) // Correctable error MCHK code
1107 stq_p r9, mchk_crd_mchk_code(r14)
1114 sll r1, 63, r9 // Move retry flag to bit 63
1115 lda r1, mchk_crd_size(r9) // Combine retry flag and frame size
1483 or r31, 1, r9 // get a one
1484 sll r9, 32, r9 // shift to <32>
1486 mtpr r9, cc_ctl // clear and enable the Cycle Counter
1539 or r31, 1, r9
1540 sll r9, pt_misc_v_switch, r9
1541 bic r0, r9, r0 // clear switch bit
1692 // r8, r9, r10 - available as all loads are physical
1710 ldq_p r9, sc_addr(r14) // SC_ADDR IPR
1711 bis r9, r31, r31 // Touch ld to make sure it completes before
1837 // r9 - sc_addr
1880 stq_p r9, mchk_sc_addr(r14)
2138 // r8,r9,r10 - available except across stq's