Searched refs:mach_inst (Results 1 - 12 of 12) sorted by relevance
/gem5/src/arch/generic/ |
H A D | decode_cache.cc | 43 TheISA::ExtMachInst mach_inst, Addr addr) 46 if (si && (si->machInst == mach_inst)) 49 auto iter = instMap.find(mach_inst); 55 si = decoder->decodeInst(mach_inst); 56 instMap[mach_inst] = si; 42 decode(TheISA::Decoder *decoder, TheISA::ExtMachInst mach_inst, Addr addr) argument
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H A D | decode_cache.hh | 55 /// @param mach_inst The binary instruction to decode. 58 TheISA::ExtMachInst mach_inst, Addr addr);
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/gem5/src/arch/riscv/ |
H A D | decoder.cc | 82 Decoder::decode(ExtMachInst mach_inst, Addr addr) argument 85 mach_inst, addr); 86 if (instMap.find(mach_inst) != instMap.end()) 87 return instMap[mach_inst]; 89 StaticInstPtr si = decodeInst(mach_inst); 90 instMap[mach_inst] = si;
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H A D | decoder.hh | 77 StaticInstPtr decodeInst(ExtMachInst mach_inst); 80 /// @param mach_inst The binary instruction to decode. 82 StaticInstPtr decode(ExtMachInst mach_inst, Addr addr);
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/gem5/src/arch/alpha/ |
H A D | decoder.hh | 94 StaticInstPtr decodeInst(ExtMachInst mach_inst); 97 /// @param mach_inst The binary instruction to decode. 100 decode(ExtMachInst mach_inst, Addr addr) argument 102 return defaultCache.decode(this, mach_inst, addr);
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/gem5/src/arch/power/ |
H A D | decoder.hh | 101 StaticInstPtr decodeInst(ExtMachInst mach_inst); 104 /// @param mach_inst The binary instruction to decode. 107 decode(ExtMachInst mach_inst, Addr addr) argument 109 return defaultCache.decode(this, mach_inst, addr);
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/gem5/src/arch/mips/ |
H A D | decoder.hh | 94 StaticInstPtr decodeInst(ExtMachInst mach_inst); 97 /// @param mach_inst The binary instruction to decode. 100 decode(ExtMachInst mach_inst, Addr addr) argument 102 return defaultCache.decode(this, mach_inst, addr);
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/gem5/src/arch/arm/ |
H A D | decoder.hh | 170 * @param mach_inst A pre-decoded instruction 173 StaticInstPtr decode(ExtMachInst mach_inst, Addr addr) argument 175 return defaultCache.decode(this, mach_inst, addr); 187 * @param mach_inst The binary instruction to decode. 190 StaticInstPtr decodeInst(ExtMachInst mach_inst);
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/gem5/src/arch/sparc/ |
H A D | decoder.hh | 108 StaticInstPtr decodeInst(ExtMachInst mach_inst); 111 /// @param mach_inst The binary instruction to decode. 114 decode(ExtMachInst mach_inst, Addr addr) argument 116 return defaultCache.decode(this, mach_inst, addr);
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/gem5/src/cpu/minor/ |
H A D | func_unit.cc | 206 /* This should work for any ISA with a POD mach_inst */ 207 TheISA::ExtMachInst mach_inst = inst->machInst; local 210 uint64_t mach_inst = 0; 221 (mach_inst & timing.mask) == timing.match) 226 i, timing.description, inst->disassemble(0), mach_inst, 236 " mach_inst: %16x\n", 237 inst->disassemble(0), mach_inst);
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/gem5/src/arch/x86/ |
H A D | decoder.hh | 343 StaticInstPtr decodeInst(ExtMachInst mach_inst); 346 /// @param mach_inst The binary instruction to decode. 348 StaticInstPtr decode(ExtMachInst mach_inst, Addr addr);
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H A D | decoder.cc | 682 Decoder::decode(ExtMachInst mach_inst, Addr addr) argument 684 auto iter = instMap->find(mach_inst); 688 StaticInstPtr si = decodeInst(mach_inst); 689 (*instMap)[mach_inst] = si;
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