Searched refs:li (Results 1 - 25 of 83) sorted by relevance

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/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64samt/
H A Dsysfutex3_d.S59 li a0, NUM_THREADS
80 li a0, SUCCESS
89 li t0, 0 // number of threads that have been waken
96 li a1, FUTEX_CMP_REQUEUE
97 li a2, 1 // wake up at most 1 thread
98 li a3, 1000 // practically is INT_MAX
100 li a5, 0
101 li a7, SYSCALL_FUTEX
117 li a1, FUTEX_WAKE
118 li a
[all...]
H A Dsysfutex_d.S58 li a0, NUM_THREADS
78 li a0, SUCCESS
90 li t0, LOOP_COUNT
96 li a1, FUTEX_WAKE_PRIVATE
97 li a2, 1 // wake up at most 1 thread
98 li a7, SYSCALL_FUTEX
111 li a1, FUTEX_WAIT_PRIVATE
112 li a2, 0 // expected val of futex_Y
113 li a7, SYSCALL_FUTEX
130 li t
[all...]
H A Dsysfutex1_d.S57 li a0, MAX_NUM_THREADS
78 li a0, SUCCESS
89 li t0, 0 // number of threads that have been waken
96 li a1, FUTEX_WAKE_PRIVATE
97 li a2, 1 // wake up at most 1 thread
98 li a7, SYSCALL_FUTEX
118 li a1, FUTEX_WAIT_PRIVATE
119 li a2, 0 // expected val of futex_X
120 li a7, SYSCALL_FUTEX
134 li a
[all...]
H A Dsysfutex2_d.S59 li a0, NUM_THREADS
80 li a0, SUCCESS
92 li t0, LOOP_COUNT
99 li a1, FUTEX_WAKE_OP
100 li a2, 1 // wake up at most 1 thread
101 li a3, 0 // should not perform the second wake up
103 li a5, FUTEX_OP(FUTEX_OP_ADD, 1, FUTEX_OP_CMP_LT, 0)
104 li a7, SYSCALL_FUTEX
122 li a1, FUTEX_WAIT_PRIVATE
123 li a
[all...]
/gem5/tests/test-progs/asmtest/src/riscv/isa/macros/mt/
H A Dtest_macros_mt.h84 li t0, NUM_THREADS
97 li a0, 0
98 li a1, STACK_SIZE
99 li a2, MMAP_PROT_FLAGS
100 li a3, MMAP_MAP_FLAGS
101 li a4, -1
102 li a5, 0
103 li a7, SYSCALL_MMAP
108 li a1, STACK_SIZE
110 li a
[all...]
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64uamt/
H A Damoadd_d.S74 li t0, 1 // one operand of amoadd_w
75 li t1, LOOP_COUNT // loop count
92 li a1, RESULT
95 li a0, SUCCESS
99 li a0, FAILURE
H A Damoor_d.S73 li t1, 8
82 li t0, 1
93 li a1, RESULT
96 li a0, SUCCESS
100 li a0, FAILURE
H A Damoxor_d.S73 li t1, 8
82 li t0, 1
93 li a1, RESULT
96 li a0, SUCCESS
100 li a0, FAILURE
H A Damoand_d.S59 li t0, 0xffffffffffffffff
80 li t1, 8
89 li t0, 1
100 li a1, RESULT
103 li a0, SUCCESS
107 li a0, FAILURE
H A Damomax_d.S59 li t0, 0x8000000000000000
80 li t1, 8
89 li t0, 1
100 li a1, RESULT
103 li a0, SUCCESS
107 li a0, FAILURE
H A Damomaxu_d.S59 li t0, 0x0000000000000000
80 li t1, 8
89 li t0, 1
100 li a1, RESULT
103 li a0, SUCCESS
107 li a0, FAILURE
H A Damomin_d.S59 li t0, 0x7fffffffffffffff
80 li t1, 8
89 li t0, 1
100 li a1, RESULT
103 li a0, SUCCESS
107 li a0, FAILURE
H A Damominu_d.S59 li t0, 0xffffffffffffffff
80 li t1, 8
89 li t0, 1
100 li a1, RESULT
103 li a0, SUCCESS
107 li a0, FAILURE
H A Damoswap_d.S76 li t0, 1 // initialize the swap value (1-locked)
77 li t1, LOOP_COUNT
104 li a1, RESULT
107 li a0, SUCCESS
111 li a0, FAILURE
H A Dlrsc_d.S76 li t0, 1 // initialize the swap value (1-locked)
77 li t1, LOOP_COUNT
106 li a1, RESULT
109 li a0, SUCCESS
113 li a0, FAILURE
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64uc/
H A Drvc.S24 li TESTNUM, 2
25 li a1, 666
36 li sp, 0x1234
48 RVC_TEST_CASE (9, a5, -16, ori a5, x0, 1; c.li a5, -16)
59 RVC_TEST_CASE (14, s0, ~0x11, c.li s0, -2; c.andi s0, ~0x10)
60 RVC_TEST_CASE (15, s1, 14, li s1, 20; li a0, 6; c.sub s1, a0)
61 RVC_TEST_CASE (16, s1, 18, li s1, 20; li a0, 6; c.xor s1, a0)
62 RVC_TEST_CASE (17, s1, 22, li s
[all...]
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64mi/
H A Daccess.S20 li t0, 1 << (__riscv_xlen - 1)
25 li TESTNUM, 2
26 li t1, CAUSE_FETCH_ACCESS
28 li t2, 0
33 li TESTNUM, 3
34 li t1, CAUSE_LOAD_ACCESS
48 li a0, 2
50 li a0, 3
/gem5/tests/test-progs/asmtest/src/riscv/isa/macros/scalar/
H A Dtest_macros.h16 li x29, MASK_XLEN(correctval); \
17 li TESTNUM, testnum; \
48 li x1, MASK_XLEN(val1); \
54 li x1, MASK_XLEN(val1); \
60 li x4, 0; \
61 1: li x1, MASK_XLEN(val1); \
66 li x5, 2; \
72 li x4, 0; \
73 1: li x1, MASK_XLEN(val1); \
77 li x
[all...]
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64si/
H A Dma_fetch.S31 li TESTNUM, 2
32 li t1, 0
45 li TESTNUM, 3
53 li TESTNUM, 4
54 li t1, 0
67 li TESTNUM, 5
68 li t1, 0
82 li TESTNUM, 6
83 li t1, 0
97 li TESTNU
[all...]
H A Dscall.S27 li TESTNUM, 2
30 li t1, CAUSE_USER_ECALL
35 li t0, MSTATUS_MPP
42 li t1, CAUSE_MACHINE_ECALL
46 li t0, SSTATUS_SPP
53 li TESTNUM, 1
H A Ddirty.S17 li a0, (SATP_MODE & ~(SATP_MODE<<1)) * SATP_MODE_SV39
25 li a1, ((MSTATUS_MPP & ~(MSTATUS_MPP<<1)) * PRV_S) | MSTATUS_MPRV
29 li TESTNUM, 2
30 li t2, 1
34 li TESTNUM, 3
35 li a1, ((MSTATUS_MPP & ~(MSTATUS_MPP<<1)) * PRV_S) | MSTATUS_SUM
50 li t0, MSTATUS_MPRV
55 li a0, PTE_A | PTE_D
60 li t0, MSTATUS_MPRV
64 li TESTNU
[all...]
/gem5/tests/test-progs/asmtest/src/riscv/env/ps/
H A Driscv_test.h51 # define CHECK_XLEN li a0, 1; slli a0, a0, 31; bgez a0, 1f; RVTEST_PASS; 1:
53 # define CHECK_XLEN li a0, 1; slli a0, a0, 31; bltz a0, 1f; RVTEST_PASS; 1:
59 li t0, -1; /* Set up a PMP to permit all accesses */ \
61 li t0, PMP_NAPOT | PMP_R | PMP_W | PMP_X; \
83 li a0, MSTATUS_MPP & (MSTATUS_MPP >> 1); \
85 li a0, SIP_SSIP | SIP_STIP; \
89 li a0, MSTATUS_MPP; \
93 li a0, MSTATUS_FS & (MSTATUS_FS >> 1); \
130 li a7, EXIT_SYSCALL; \
141 li a
[all...]
/gem5/tests/test-progs/asmtest/src/riscv/env/p/
H A Driscv_test.h51 # define CHECK_XLEN li a0, 1; slli a0, a0, 31; bgez a0, 1f; RVTEST_PASS; 1:
53 # define CHECK_XLEN li a0, 1; slli a0, a0, 31; bltz a0, 1f; RVTEST_PASS; 1:
59 li t0, -1; /* Set up a PMP to permit all accesses */ \
61 li t0, PMP_NAPOT | PMP_R | PMP_W | PMP_X; \
83 li a0, MSTATUS_MPP & (MSTATUS_MPP >> 1); \
85 li a0, SIP_SSIP | SIP_STIP; \
89 li a0, MSTATUS_MPP; \
93 li a0, MSTATUS_FS & (MSTATUS_FS >> 1); \
121 li t6, CAUSE_USER_ECALL; \
123 li t
[all...]
/gem5/tests/test-progs/asmtest/src/riscv/isa/rv64ua/
H A Damoadd_w.S17 li a0, 0xffffffff80000000; \
18 li a1, 0xfffffffffffff800; \
28 li a1, 0xffffffff80000000; \
H A Damoand_d.S17 li a0, 0xffffffff80000000; \
18 li a1, 0xfffffffffffff800; \
28 li a1, 0x0000000080000000; \

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