Searched refs:it_end (Results 1 - 9 of 9) sorted by relevance

/gem5/src/cpu/
H A Dutils.hh89 const std::vector<bool>::const_iterator& it_end)
92 for (;it_tmp != it_end && !(*it_tmp); ++it_tmp);
93 return (it_tmp != it_end);
88 isAnyActiveElement(const std::vector<bool>::const_iterator& it_start, const std::vector<bool>::const_iterator& it_end) argument
/gem5/ext/dsent/model/
H A DEventInfo.cc36 Map<PortInfo*>::ConstIterator it_end = port_infos_->end(); local
38 for(it = it_begin; it != it_end; ++it)
76 Map<TransitionInfo>::Iterator it_end = m_trans_info_map_->end(); local
78 for(it = it_begin; it != it_end; ++it)
89 Map<TransitionInfo>::Iterator it_end = m_trans_info_map_->end(); local
91 for(it = it_begin; it != it_end; ++it)
H A DElectricalModel.cc650 TechModel::ConstWireLayerIterator it_end = getTechModel()->getAvailableWireLayers()->end(); local
652 for(it = it_begin; it != it_end; ++it)
673 TechModel::ConstWireLayerIterator it_end = getTechModel()->getAvailableWireLayers()->end(); local
675 for(it = it_begin; it != it_end; ++it)
703 TechModel::ConstWireLayerIterator it_end = getTechModel()->getAvailableWireLayers()->end(); local
705 for(it = it_begin; it != it_end; ++it)
725 TechModel::ConstWireLayerIterator it_end = getTechModel()->getAvailableWireLayers()->end(); local
727 for(it = it_begin; it != it_end; ++it)
754 TechModel::ConstWireLayerIterator it_end = getTechModel()->getAvailableWireLayers()->end(); local
756 for(it = it_begin; it != it_end;
870 Map<PortInfo*>::ConstIterator it_end = m_input_ports_->end(); local
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/gem5/ext/dsent/model/timing_graph/
H A DElectricalTimingOptimizer.cc60 Map<PortInfo*>::ConstIterator it_end = port_info->end(); local
63 for(it = it_begin; it != it_end; ++it)
/gem5/src/cpu/checker/
H A Dcpu.cc160 auto it_end = byte_enable.cbegin() + (size - size_left); local
161 if (isAnyActiveElement(it_start, it_end)) {
165 mem_req->setByteEnable(std::vector<bool>(it_start, it_end));
/gem5/ext/dsent/
H A DDSENT.cc61 Map<PortInfo*>::ConstIterator it_end = input_ports->end(); local
63 for(it = it_begin; it != it_end; ++it)
72 for(it = it_begin; it != it_end; ++it)
/gem5/src/cpu/o3/
H A Dlsq_impl.hh917 auto it_end = _byteEnable.begin() + (next_addr - base_addr); local
919 std::vector<bool>(it_start, it_end));
930 auto it_end = _byteEnable.begin() + size_so_far + cacheLineSize; local
932 std::vector<bool>(it_start, it_end));
944 auto it_end = _byteEnable.end(); local
946 std::vector<bool>(it_start, it_end));
/gem5/src/cpu/simple/
H A Datomic.cc354 auto it_end = byte_enable.begin() + (size - size_left);
355 if (isAnyActiveElement(it_start, it_end)) {
358 req->setByteEnable(std::vector<bool>(it_start, it_end));
/gem5/src/cpu/minor/
H A Dlsq.cc502 auto it_end = byte_enable.begin() + local
504 if (isAnyActiveElement(it_start, it_end)) {
509 fragment->setByteEnable(std::vector<bool>(it_start, it_end));

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