Searched refs:_iss (Results 1 - 4 of 4) sorted by relevance
/gem5/src/arch/arm/ |
H A D | faults.hh | 201 ArmFault(ExtMachInst _machInst = 0, uint32_t _iss = 0) : 202 machInst(_machInst), issRaw(_iss), from64(false), to64(false), 249 ArmFaultVals<T>(ExtMachInst _machInst = 0, uint32_t _iss = 0) : 250 ArmFault(_machInst, _iss) {} 304 UndefinedInstruction(ExtMachInst _machInst, uint32_t _iss, argument 306 ArmFaultVals<UndefinedInstruction>(_machInst, _iss), 323 SupervisorCall(ExtMachInst _machInst, uint32_t _iss, argument 325 ArmFaultVals<SupervisorCall>(_machInst, _iss), 356 SupervisorTrap(ExtMachInst _machInst, uint32_t _iss, argument 358 ArmFaultVals<SupervisorTrap>(_machInst, _iss), 374 SecureMonitorTrap(ExtMachInst _machInst, uint32_t _iss, ExceptionClass _overrideEc = EC_INVALID) argument 398 HypervisorTrap(ExtMachInst _machInst, uint32_t _iss, ExceptionClass _overrideEc = EC_INVALID) argument [all...] |
H A D | faults.cc | 1580 SoftwareBreakpoint::SoftwareBreakpoint(ExtMachInst _mach_inst, uint32_t _iss) argument 1581 : ArmFaultVals<SoftwareBreakpoint>(_mach_inst, _iss)
|
/gem5/src/arch/arm/insts/ |
H A D | misc.cc | 331 uint64_t _iss, MiscRegIndex _miscReg) 335 iss = _iss; 359 ExtMachInst _machInst, uint64_t _iss, 361 : McrMrcMiscInst(_mnemonic, _machInst, _iss, _miscReg) 330 McrMrcMiscInst(const char *_mnemonic, ExtMachInst _machInst, uint64_t _iss, MiscRegIndex _miscReg) argument 358 McrMrcImplDefined(const char *_mnemonic, ExtMachInst _machInst, uint64_t _iss, MiscRegIndex _miscReg) argument
|
H A D | misc.hh | 391 uint64_t _iss, MiscRegIndex _miscReg); 409 uint64_t _iss, MiscRegIndex _miscReg);
|
Completed in 9 milliseconds