Searched refs:_destRegIdx (Results 1 - 16 of 16) sorted by relevance

/gem5/src/arch/riscv/insts/
H A Damo.cc66 ss << mnemonic << ' ' << registerName(_destRegIdx[0]) << ", ("
75 ss << mnemonic << ' ' << registerName(_destRegIdx[0]) << ", ("
85 ss << mnemonic << ' ' << registerName(_destRegIdx[0]) << ", "
95 ss << mnemonic << ' ' << registerName(_destRegIdx[0]) << ", "
106 ss << mnemonic << ' ' << registerName(_destRegIdx[0]) << ", "
116 ss << mnemonic << ' ' << registerName(_destRegIdx[0]) << ", "
H A Dstandard.cc50 ss << mnemonic << ' ' << registerName(_destRegIdx[0]) << ", " <<
60 ss << mnemonic << ' ' << registerName(_destRegIdx[0]) << ", ";
H A Dcompressed.cc47 ss << mnemonic << ' ' << registerName(_destRegIdx[0]) << ", " <<
H A Dmem.cc51 ss << mnemonic << ' ' << registerName(_destRegIdx[0]) << ", " <<
/gem5/src/arch/power/insts/
H A Dfloating.cc44 printReg(ss, _destRegIdx[0]);
H A Dmisc.cc44 printReg(ss, _destRegIdx[0]);
H A Dinteger.cc64 printReg(ss, _destRegIdx[0]);
101 printReg(ss, _destRegIdx[0]);
128 printReg(ss, _destRegIdx[0]);
155 printReg(ss, _destRegIdx[0]);
H A Dmem.cc57 printReg(ss, _destRegIdx[_numDestRegs-1]);
/gem5/src/arch/sparc/insts/
H A Dblockmem.cc56 printReg(response, _destRegIdx[0]);
82 printReg(response, _destRegIdx[0]);
H A Dmem.cc59 printReg(response, _destRegIdx[0]);
88 printReg(response, _destRegIdx[0]);
H A Dstatic_inst.cc93 printReg(os, _destRegIdx[reg]);
272 printReg(ss, _destRegIdx[0]);
/gem5/src/cpu/o3/
H A Ddyn_inst.hh108 using BaseDynInst<Impl>::_destRegIdx;
294 return this->cpu->getWritableVecReg(this->_destRegIdx[idx]);
332 return cpu->template setVecLane(_destRegIdx[idx], val);
374 return this->cpu->getWritableVecPredReg(this->_destRegIdx[idx]);
389 this->cpu->setIntReg(this->_destRegIdx[idx], val);
396 this->cpu->setFloatReg(this->_destRegIdx[idx], val);
404 this->cpu->setVecReg(this->_destRegIdx[idx], val);
412 this->cpu->setVecElem(this->_destRegIdx[reg_idx], val);
420 this->cpu->setVecPredReg(this->_destRegIdx[idx], val);
426 this->cpu->setCCReg(this->_destRegIdx[id
[all...]
/gem5/src/arch/x86/insts/
H A Dstatic_inst.hh110 if (_destRegIdx[0].index() & IntFoldBit)
H A Dstatic_inst.cc119 printReg(os, _destRegIdx[reg], size);
/gem5/src/cpu/
H A Dstatic_inst.hh216 const RegId& destRegIdx(int i) const { return _destRegIdx[i]; }
234 RegId _destRegIdx[MaxInstDestRegs]; member in class:StaticInst
H A Dbase_dyn_inst.hh258 std::array<PhysRegIdPtr, TheISA::MaxInstDestRegs> _destRegIdx; member in class:BaseDynInst
358 return _destRegIdx[idx];
391 _destRegIdx[idx] = renamed_dest;

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