Searched refs:TSDEV_CC_CSR (Results 1 - 3 of 3) sorted by relevance

/gem5/src/dev/alpha/
H A Dtsunamireg.h41 #define TSDEV_CC_CSR 0x00 macro
H A Dtsunami_cchip.cc105 case TSDEV_CC_CSR:
250 case TSDEV_CC_CSR:
251 panic("TSDEV_CC_CSR write\n");
/gem5/src/dev/mips/
H A Dmaltareg.h43 #define TSDEV_CC_CSR 0x00 macro

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