Searched refs:RiscvStaticInst (Results 1 - 5 of 5) sorted by relevance

/gem5/src/arch/riscv/insts/
H A Dcompressed.hh46 class CompRegOp : public RiscvStaticInst
49 using RiscvStaticInst::RiscvStaticInst;
H A Dstandard.hh48 class RegOp : public RiscvStaticInst
51 using RiscvStaticInst::RiscvStaticInst;
61 class ImmOp : public RiscvStaticInst
67 : RiscvStaticInst(mnem, _machInst, __opClass), imm(0)
74 class SystemOp : public RiscvStaticInst
77 using RiscvStaticInst::RiscvStaticInst;
89 class CSROp : public RiscvStaticInst
97 : RiscvStaticInst(mne
[all...]
H A Dunknown.hh52 class Unknown : public RiscvStaticInst
56 : RiscvStaticInst("unknown", _machInst, No_OpClass)
H A Dstatic_inst.hh49 class RiscvStaticInst : public StaticInst class in namespace:RiscvISA
67 class RiscvMacroInst : public RiscvStaticInst
74 RiscvStaticInst(mnem, _machInst, __opClass)
110 class RiscvMicroInst : public RiscvStaticInst
115 RiscvStaticInst(mnem, _machInst, __opClass)
H A Dmem.hh44 class MemInst : public RiscvStaticInst
51 : RiscvStaticInst(mnem, _machInst, __opClass), offset(0)

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