Searched refs:MISCREG_TOP_MEM (Results 1 - 4 of 4) sorted by relevance

/gem5/src/arch/x86/regs/
H A Dmsr.cc136 MsrVal(0xC001001A, MISCREG_TOP_MEM),
H A Dmisc.hh285 MISCREG_TOP_MEM = MISCREG_IORR_MASK_END, enumerator in enum:X86ISA::MiscRegIndex
/gem5/src/arch/x86/
H A Dutility.cc168 tc->setMiscReg(MISCREG_TOP_MEM, 0x4000000);
/gem5/src/gpu-compute/
H A Dgpu_tlb.cc583 regNum = MISCREG_TOP_MEM;

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