Searched refs:MISCREG_TLBI_VALE1IS_Xt (Results 1 - 5 of 5) sorted by relevance

/gem5/src/arch/arm/insts/
H A Dmisc64.cc194 case MISCREG_TLBI_VALE1IS_Xt:
/gem5/src/arch/arm/
H A Dmiscregs.hh556 MISCREG_TLBI_VALE1IS_Xt, enumerator in enum:ArmISA::MiscRegIndex
H A Disa.cc1516 case MISCREG_TLBI_VALE1IS_Xt:
H A Dmiscregs.cc1340 return MISCREG_TLBI_VALE1IS_Xt;
4223 InitReg(MISCREG_TLBI_VALE1IS_Xt)
/gem5/src/arch/arm/tracers/
H A Dtarmac_parser.cc517 { "tlbi_vale1is_xt", MISCREG_TLBI_VALE1IS_Xt },

Completed in 33 milliseconds