Searched refs:MISCREG_MTRR_PHYS_MASK_7 (Results 1 - 3 of 3) sorted by relevance
/gem5/src/arch/x86/regs/ | ||
H A D | msr.cc | 68 MsrVal(0x20F, MISCREG_MTRR_PHYS_MASK_7), |
H A D | misc.hh | 183 MISCREG_MTRR_PHYS_MASK_7, enumerator in enum:X86ISA::MiscRegIndex |
/gem5/src/gpu-compute/ | ||
H A D | gpu_tlb.cc | 379 regNum = MISCREG_MTRR_PHYS_MASK_7; |
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