Searched refs:MISCREG_MC3_CTL (Results 1 - 3 of 3) sorted by relevance

/gem5/src/arch/x86/regs/
H A Dmsr.cc85 MsrVal(0x40C, MISCREG_MC3_CTL),
H A Dmisc.hh206 MISCREG_MC3_CTL, enumerator in enum:X86ISA::MiscRegIndex
/gem5/src/gpu-compute/
H A Dgpu_tlb.cc430 regNum = MISCREG_MC3_CTL;

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