Searched refs:MISCREG_ID_DFR0 (Results 1 - 5 of 5) sorted by relevance

/gem5/src/arch/arm/
H A Dutility.cc507 case MISCREG_ID_DFR0:
H A Dmiscregs.hh152 MISCREG_ID_DFR0, enumerator in enum:ArmISA::MiscRegIndex
H A Disa.cc360 miscRegs[MISCREG_ID_DFR0] = miscRegs[MISCREG_ID_DFR0_EL1];
1076 case MISCREG_ID_DFR0:
H A Dmiscregs.cc162 return MISCREG_ID_DFR0;
3130 InitReg(MISCREG_ID_DFR0)
3894 .mapsTo(MISCREG_ID_DFR0);
/gem5/src/arch/arm/tracers/
H A Dtarmac_parser.cc140 { "id_dfr0", MISCREG_ID_DFR0 },

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