Searched refs:MISCREG_GS_BASE (Results 1 - 5 of 5) sorted by relevance

/gem5/src/arch/x86/regs/
H A Dmsr.cc120 MsrVal(0xC0000101, MISCREG_GS_BASE),
H A Dmisc.hh319 MISCREG_GS_BASE, enumerator in enum:X86ISA::MiscRegIndex
/gem5/src/arch/x86/
H A Disa.cc286 case MISCREG_GS_BASE:
/gem5/src/arch/x86/linux/
H A Dprocess.cc141 tc->setMiscRegNoEffect(MISCREG_GS_BASE, addr);
145 gsBase = tc->readMiscRegNoEffect(MISCREG_GS_BASE);
/gem5/src/gpu-compute/
H A Dgpu_tlb.cc535 regNum = MISCREG_GS_BASE;

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