Searched refs:INTREG_ZERO (Results 1 - 7 of 7) sorted by relevance
/gem5/src/arch/arm/ |
H A D | intregs.hh | 114 INTREG_ZERO, enumerator in enum:ArmISA::IntRegIndex 314 INTREG_R12_FIQ, INTREG_R13_FIQ, INTREG_R14_FIQ, INTREG_ZERO 322 INTREG_ZERO, INTREG_ZERO, INTREG_ZERO, INTREG_ZERO, 323 INTREG_ZERO, INTREG_ZERO, INTREG_ZERO, INTREG_ZERO, [all...] |
H A D | registers.hh | 126 const int ZeroReg = INTREG_ZERO;
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/gem5/src/arch/arm/insts/ |
H A D | pred_inst.cc | 83 INTREG_ZERO, INTREG_ZERO, 0, LSL, imm); 92 op2, INTREG_ZERO, shiftAmt, shiftType, 0);
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H A D | data64.cc | 50 INTREG_ZERO, INTREG_ZERO, 0, LSL, imm); 69 op2, INTREG_ZERO, shiftAmt, shiftType, 0); 78 op2, INTREG_ZERO, shiftAmt, LSL, 0);
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H A D | misc.cc | 319 printShiftOperand(ss, op1, true, shiftAmt, INTREG_ZERO, shiftType);
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H A D | mem64.hh | 257 : Memory64(mnem, _machInst, __opClass, _dest, INTREG_ZERO), imm(_imm)
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H A D | static_inst.cc | 502 if (rm != INTREG_ZERO) { 598 if (rd != INTREG_ZERO) { 604 if (rn != INTREG_ZERO) {
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